Diagnosing the root cause of a failure is particularly challenging if the symptom of the failure is not consistently observable. This article focuses on Laser Assisted Device Alteration/Soft Defect Localization (LADA/SDL), a global fault isolation technique, for detecting such failures. The discussion begins with a section describing the three steps in LADA/SDL analysis setup: create the test loop with the fail flag and loop trigger, select the laser dwell time, and select the shmoo bias point. An overview of LADA/SDL workflow is then presented followed by a brief section on time-resolved LADA. The closing pages of the article consider in detail SDL laser interaction physics and LADA laser interaction physics.

Laser Voltage Probing (LVP) is a key enabling technology that has matured into a well-established and essential analytical optical technique that is crucial for observing and evaluating internal circuit activity. This article begins by providing an overview on LVP history and LVP theory, providing information on electro-optical effects and free-carrier effects. It then focuses on commercially available continuous wave LVP systems. Alternative optoelectronic imaging and probing technologies for fault isolation, namely frequency mapping and laser voltage tracing, are also discussed. The subsequent section provides information on the use of Visible Laser Probing. The article closes with some common LVP observations/considerations and limitations and future work concerning LVP.

This article provides an introduction to the dynamic random access memory (DRAM) operation with a focus to localization techniques of the defects combined with some physical failure analysis examples and case studies for memory array failures. It discusses the electrical measurement techniques for array failure analysis. The article then presents know-how-based analysis techniques of array failures by bitmap classification. The limits of bitmapping that lead to well-known localization techniques like thermally induced voltage alteration and optical beam induced resistance change are also discussed. The article concludes by providing information on soft defect localization techniques.

With semiconductor device dimension continuously scaling down and increasing complexity in integrated circuits, delayering techniques for reverse engineering is becoming increasingly challenging. The primary goal of delayering in semiconductor failure analysis is to successfully remove layers of material in order to locate and identify the area of interest. Several of the top-down delayering techniques include wet chemical etching, dry reactive ion etching, top-down parallel lapping (including chemical-mechanical polishing), ion beam milling and laser delayering techniques. This article discusses the general procedure, types, advantages, and disadvantages of each of these techniques. In this article, two types of different semiconductor die level backend of line technologies are presented: aluminum metallization and copper metallization.

The need for precise targeted interactive surgery on boards or modules is the main driver of backside preparation technology. This article assists the analyst in making decisions on backside thinning and polishing requirements. Thinning of the substrates can be accomplished by flat lapping, laser assisted chemical etch, plasma reactive ion etch, and CNC based milling and polishing. The article discusses the general characteristics, key principles, advantages, and disadvantages of these processes. It also contains case studies that illustrate the application of these processes to ceramic cavity devices, injection molded parts, and ball grid arrays.

This chapter discusses the processes involved in heat treating of stainless steels, providing information on the classification, chemical compositions, and corrosion resistance of stainless steels. Five groups of stainless steels are discussed: austenitic, ferritic, martensitic, precipitation-hardening, and duplex grades. The chapter also describes the heat treatment conditions that should be followed for processing of stainless steels.

This chapter gives an overview of how steel castings may be effectively adapted to modern concurrent engineering processes. The chapter discusses computer aided design programs, solid modeling, solidification simulation programs, and rapid prototyping.

Moore's Law has driven many degree circuit features below the resolving capability of optical microscopy. Yet the optical microscope remains a valuable tool in failure analysis. This article describes the physics governing resolution and useful techniques for extracting the small details. It begins with the basic microscope column and construction. The article discusses microscope adjustments, brightfield and darkfield illumination, and microscope concepts important to liquid crystal techniques. It also discusses solid immersion lenses, infrared and ultraviolet microscopy and concludes with laser microscopy techniques such as thermal induced voltage alteration and external induced voltage alteration.

Optoelectronic components can be readily classified as active light-emitting components (such as semiconductor lasers and light emitting diodes), electrically active but non-emitting components, and inactive components. This chapter focuses on the first category, and particularly on semiconductor lasers. The discussion begins with the basics of semiconductor lasers and the material science behind some causes of device failure. It then covers some of the common failure mechanisms, highlighting the need to identify failures as wearout or maverick failures. The chapter also covers the capabilities of many key optoelectronic failure analysis tools. The final section describes the common steps that should be followed so as to assure product reliability of optoelectronic components.

This chapter describes sheet metal forming operations, including cutting, blanking, piercing, and bending as well as deep drawing, spinning, press-brake and stretch forming, fluid forming, and drop hammer and electromagnetic forming. It also discusses the selection and use of die materials and lubricants along with superplastic forming techniques.

This chapter discusses surface engineering treatments, including flame hardening, induction hardening, high-energy beam hardening, laser melting, and shot peening. It describes the basic implementation of each method, the materials for which they are suited, and their effect on surface metallurgy.

Over the revolutionary era of semiconductor technology, Computer-Aided Design Navigation (CADNav) tools have played an increasingly critical role in silicon debug and failure analysis (FA) in efforts to improve manufacturing yield while reducing time-to-market for integrated circuit (IC) products. This article encompasses the key principles of CADNav for various aspects of semiconductor FA and its importance for improved yield and profitability. An overview of the required input data and formats are described for both IC and package devices, along with key considerations and best practices recommended for fast fault localization, accurate root cause analysis, FA equipment utilization, efficient cross-team collaboration, and database management. Challenges with an FA lab ecosystem are addressed by providing an integrated database and software platform that enable design layout and schematic analysis in the FA lab for quick and accurate navigation and cross-tool collaboration.

This chapter discusses the advantages, limitations, and applications of various aluminum casting processes, namely green sand casting process, air set or no-bake molding process, vacuum molding process, evaporative foam casting process, and die casting process. The processes covered also include gravity permanent molding, low-pressure permanent molding, counter pressure, squeeze casting, investment casting, rapid prototype casting, cast forge hybrid, and semisolid metal processes.

Electronics spans a number of devices, their configurations, and properties. A challenge is to identify those electronic subjects essential for failure analysis. This article reviews the normal operation and terminal characteristics of MOSFET. It describes the electronic behavior of bridges, opens, and parametric delay defects, which is essential for understanding the symptoms of a failing IC. These electronic principles are then applied to a CMOS failure analysis technique using a power supply signature analysis.

This chapter begins with a review of some of the terms used in the gear industry to describe the design of gears and gear geometries. It then discusses the types of gears that operate on parallel shafts, intersecting shafts, and nonparallel and nonintersecting shafts. Next, the processes involved in the selection of gear are discussed, followed by information on the basic stresses applied to a gear tooth, the strength of a gear tooth, and the most widely used gear materials. Further, the chapter briefly reviews gear manufacturing methods and the heat treating processing steps including prehardening processes, through hardening, and case hardening processes.

Resistance welding is a group of processes in which the heat for welding is generated by the resistance to the flow of an electrical current through the parts being joined. This chapter discusses the processes, advantages, and limitations of specific resistance welding processes, namely resistance spot welding, resistance seam welding, projection welding, flash welding, and upset welding.

The orientation of the devices within a package determine the best chosen approach for access to a select component embedded in epoxy both in package or System in Package and multi-chip module (MCM). This article assists the analyst in making decisions on frontside access using flat lapping, chemical decapsulation, laser ablation, plasma reactive ion etching (RIE), CNC based milling and polishing, or a combination of these coupled with optical or electrical endpoint means. This article discusses the general characteristics, advantages, and disadvantages of each of these techniques. It also presents a case study illustrating the application of CNC milling to isolate MCM leakage failure.

This chapter provides basic engineering information on aluminum alloys with an emphasis on their use in applications where weight is a significant design factor. It discusses the advantages and limitations of various types of aluminum along with their compositions, designations, and achievable strengths. It explains how some alloys are hardened through solution strengthening and cold working, while others are strengthened by precipitation hardening. It also describes production and fabrication processes such as melting, casting, rolling, forging, forming, extruding, heat treating, and joining, and includes a section on the causes and effects of corrosion and how they are typically controlled.

This article introduces the wafer-level fault localization failure analysis (FA) process flow for an accelerated yield ramp-up of integrated circuits. It discusses the primary design considerations of a fault localization system with an emphasis on complex tester-based applications. The article presents examples that demonstrate the benefits of the enhanced wafer-level FA process. It also introduces the setup of the wafer-level fault localization system. The application of the wafer-level FA process on a 22 nm technology device failing memory test is studied and some common design limitations and their implications are discussed. The article presents a case study and finally introduces a different value-add application flow capitalizing on the wafer-level fault localization system.

This chapter focuses on the processes and mechanisms involved in fatigue. It begins with a review of some of the early theories of fatigue and the tools subsequently used to obtain a better understanding of the fatigue process. It then explains how plasticity plays a major role in creating dislocations, breaking up grains into subgrains, and causing microscopic imperfections to coalesce into larger flaws. It also discusses the factors that contribute to the development and propagation of fatigue cracks, including surface deterioration, volumetric and environmental effects, foreign particles, and stresses generated by rolling contact.