Wrought tubular products are nondestructively inspected chiefly by eddy current techniques (including the magnetic flux leakage technique) and by ultrasonic techniques. The methods discussed in this chapter include eddy current inspection, flux leakage inspection, ultrasonic inspection, magnetic particle inspection, liquid penetrant inspection, and radiographic inspection of resistance welded tubular products, seamless steel tubular products, and nonferrous tubular products. This chapter discusses the fundamental factors that should be considered in selecting a nondestructive inspection method and in selecting from among the commercially available inspection equipment. The factors covered are product characteristics, nature of the flaws, extraneous variables, rate of inspection, end effect, mill versus laboratory inspection, specification requirements, equipment costs, and operating costs.

The orientation of the devices within a package determine the best chosen approach for access to a select component embedded in epoxy both in package or System in Package and multi-chip module (MCM). This article assists the analyst in making decisions on frontside access using flat lapping, chemical decapsulation, laser ablation, plasma reactive ion etching (RIE), CNC based milling and polishing, or a combination of these coupled with optical or electrical endpoint means. This article discusses the general characteristics, advantages, and disadvantages of each of these techniques. It also presents a case study illustrating the application of CNC milling to isolate MCM leakage failure.

This chapter provides a comprehensive overview over all phenomena related to Voltage Contrast (VC) mechanisms in SEM and FIB. The multiple advantages, possibilities, and limits of active and passive VC failure localization are systemized and discussed. The knowledge of all facts influencing the VC generation (capacitance, leakage, doping, and circuitry) is very helpful for successful failure localization.

Passive components can be broadly divided into capacitors, resistors, and inductors. Failure analysis of these components helps determine the root cause and improve the overall quality and reliability of the electronic systems. This article describes different failure analysis approaches used for these components. It discusses different types of capacitors along with their constructions and failure modes. The types include tantalum, aluminum electrolytic, multi-layered ceramics, film, and super capacitors. The article then provides a discussion on the two common types of inductors, namely, common mode choke coil and surface mount powder choke coil.

Helicopter control mechanisms were failing at a higher than normal rate on high-altitude flights in mountainous regions. All of the failures occurred at or near attachment points on pressurized tubes, causing a pressure drop and partial loss of function. Visual and SEM examinations revealed cracks along the inner surface of the tubes, some of which had propagated through the thickness of the wall. Cracks emanating from weld toes were also visible. Based on their observations, investigators concluded that the tubes were subjected to excessive flexural load, causing cracks due to fatigue. They also provide recommendations for avoiding such failures in the future.

This article addresses the ancillary issues regarding the nanoprobing and characterization of transistors, probing copper metallization layers, and the various imaging techniques. The discussion includes several characterization examples of known transistor failure types, namely four probe transistor characterization, two probe transistor characterization, and probing and characterizing metallization issues. The imaging techniques discussed are those that are specific to atomic force nanoprober or scanning electron microscope based tools. They are current contrast imaging, scanning capacitance imaging, e-beam absorbed current imaging, e-beam induced current imaging, e-beam induced resistance change imaging, and active voltage contrast imaging.

In the Semiconductor I/C industry, it has been well documented that the proportion of factory and customer field returns attributed to device damage resulting from electrical over-stress (EOS) and electro-static discharge (ESD) can amount to 40 to 50%. This study entailed EOS and ESD simulation using a variety of models, namely the Human Body Model (HBM), the Charged Device Model (CDM) and the so-called Machine Model (MM), and then conducting electrical and physical failure analysis and comparing the results with documented analyses performed on customer field returns and factory failures. It is shown that a distinction can be made between EOS and ESD failures and between the characteristic failure signatures produced by the ESD models. The CDM physical failure location is at the input buffer and in the gate oxide, where as both HBM and MM failures occur mostly in the contacts at the input protection structures.

Boiler tube failures associated with material defects are often the result of poor quality control, whether in primary production, on-site fabrication, storage and handling, or installation. This chapter examines quality-related failures stemming from compositional and structural defects, forming and welding defects, design defects, improper cleaning methods, and ineffective maintenance. It also includes case studies and illustrations.

Leaks can occur as the result of several failure causes. This chapter reviews the causes, features, and impact of various types of leaks, namely gasket leaks, O-ring leaks, bond-joint leaks, weld leaks, polyvinyl chloride leaks, valve leaks, and structural leaks.

Transistors are the most important active structure of any semiconductor component. Performance characteristics of such devices within the specifications are key to ensuring proper functionality and long-term reliability of the product. In this article, a summary of the semiconductor technology from design to manufacturing and the characterization methods are discussed. The focus is on two prominent MOS structures: planar MOS device and FinFET device. The article covers the device parameters and device properties that determine the design criteria and the device tuning procedures. The discussion includes the effects of drain induced barrier lowering, velocity saturation, hot carrier degradation, and short channel on these devices.

This chapter discusses the effects of corrosion on boiler tube surfaces exposed to water and steam. It describes the process of corrosion, the formation of scale, and the oxides of iron from which it forms. It addresses the primary types of corrosion found in boiler environments, including general corrosion, under-deposit corrosion, microbially induced corrosion, flow-accelerated corrosion, stress-assisted corrosion, erosion-corrosion, cavitation, oxygen pitting, stress-corrosion cracking, and caustic embrittlement. The discussion is supported by several illustrations and relevant case studies.

Root cause of failure in automotive electronics cannot be explained by the failure signatures of failed devices. Deeper investigations in these cases reveals that a superimposition of impact factors, which can never be represented by usual qualification testing, caused the failure. This article highlights some of the most frequent early life failure types in automotive applications. It describes some of the critical things to be considered while handling packages and printed circuit board layout. The article also provides information on failure anamnesis that shows how to use history, failure signatures, environmental conditions, regional failure occurrences, user profile issues, and more in the failure analysis process to improve root cause findings.

Boiler tubes subjected to cyclic or fluctuating loads over extended periods of time are prone to fatigue failure. Fatigue can occur at relatively low stresses and is implicated in almost 80% of the tube failures in firetube boilers. This chapter covers the most common forms of boiler tube fatigue, including mechanical or vibrational fatigue, corrosion fatigue, thermal fatigue, and creep-fatigue interaction. It discusses the causes, characteristics, and impacts of each type and provides several case studies.

Boiler tubes operating at high temperatures under significant pressure are vulnerable to stress rupture failures. This chapter examines the cause, effect, and appearance of such failures. It discusses the conditions and mechanisms that either lead to or are associated with stress rupture, including overheating, high-temperature creep, graphitization, and dissimilar metal welds. It explains how to determine which mechanisms are in play by interpreting fracture patterns and microstructural details. It also describes the investigation of several carbon and low-alloy steel tubes that failed due to stress rupture.

Liquid penetrant, magnetic particle, and eddy current inspection are used to detect surface flaws. This chapter is a detailed account of the physical principles, process description, equipment requirements, selection criteria, advantages, limitations, and applications of these surface flaw detection techniques.

Optoelectronic components can be readily classified as active light-emitting components (such as semiconductor lasers and light emitting diodes), electrically active but non-emitting components, and inactive components. This chapter focuses on the first category, and particularly on semiconductor lasers. The discussion begins with the basics of semiconductor lasers and the material science behind some causes of device failure. It then covers some of the common failure mechanisms, highlighting the need to identify failures as wearout or maverick failures. The chapter also covers the capabilities of many key optoelectronic failure analysis tools. The final section describes the common steps that should be followed so as to assure product reliability of optoelectronic components.

Since the introduction of chip scale packages (CSPs) in the early 90s, they have continuously increased their market share due to their advantages of small form factor, cost effectiveness and PCB optimization. The reduced package size brings challenges in performing failure analysis. This article provides an overview of CSPs and their classification as well as their advantages and applications, and reveals some of the challenges in performing failure analysis on CSPs, particularly for CSPs in special package configurations such as stacked die multi-chip-packages (MCPs) and wafer level CSPs (WLCSPs). The discussion covers special requirements of CSPs such as precision decapsulation for fine ball grid array packages, accessing the failing die for MCP packages, and careful handling for WLCSP. Solutions and best practices are shared on how to overcome these challenges. The article also presents a few case studies to demonstrate how failure analysis work on CSPs can be successfully completed.

This chapter describes a sheet metal forming method, called hydroforming, that uses pressurized liquid and a shaped punch or die. It discusses the advantages and disadvantages of the two approaches, the effect of process variations, and tooling modifications intended to reduce sheet bulging. It identifies the factors that influence part quality and explains how finite-element analysis can be used to optimize hydroforming operations. It also discusses the economics of sheet hydroforming and presents several application examples.

This chapter presents an overview of microprocessor and application specific integrated circuit (IC) testing. It begins with a description of key industry trends that will impact how ICs will be tested in the future. Next, it provides a brief description of the most common tests applied in the IC industry, where technical issues that are causing methodology changes are emphasized. These include functional testing, structural testing, scan-based delay testing, built-in self-testing, memory testing, analog circuit testing, system-on-a-chip testing, and reliability testing. Trends discussed have driven the development of novel focus areas in test and the chapter discusses several of those areas, including test data volume containment, test power containment, and novel methods of defect-based test.

This article provides an introduction to the dynamic random access memory (DRAM) operation with a focus to localization techniques of the defects combined with some physical failure analysis examples and case studies for memory array failures. It discusses the electrical measurement techniques for array failure analysis. The article then presents know-how-based analysis techniques of array failures by bitmap classification. The limits of bitmapping that lead to well-known localization techniques like thermally induced voltage alteration and optical beam induced resistance change are also discussed. The article concludes by providing information on soft defect localization techniques.