Search Results for J-integral testing

This article briefly describes the historical development of fracture resistance testing of polymers and reviews several test methods developed for determining the fracture toughness of polymeric materials. The discussion covers J-integral testing, the methods for determining linear elastic fracture toughness, testing of thin sheets and films, normalization methods, and hysteresis methods.

This chapter reviews the concepts of fracture mechanics and their application to materials evaluation and the design of cryogenic structures. Emphasis is placed on an explanation of technology, a review of fracture mechanics testing methods, and a discussion on the many factors contributing to the fracture behavior of materials at cryogenic temperatures. Three approaches of elastic-plastic fracture mechanics are covered, namely the crack opening displacement, the J-integral, and the R-curve methods. The chapter also discusses the influence of thermal and metallurgical effects on toughness at low temperatures.

Fracture mechanics is the science of predicting the load-carrying capabilities of cracked structures based on a mathematical description of the stress field surrounding the crack. The fundamental ideas stem from the work of Griffith, who demonstrated that the strain energy released upon crack extension is the driving force for fracture in a cracked material under load. This chapter provides a summary of Griffith’s work and the subsequent development of linear elastic and elastic-plastic fracture mechanics. It includes detailed illustrations and examples, familiarizing readers with the steps involved in determining strain energy release rates, stress intensity factors, J-integrals, R-curves, and crack tip opening displacement parameters. It also covers fracture toughness testing methods and the effect of measurement variables.

The toughness of a material is its ability to absorb energy in the form of plastic deformation without fracturing. It is thus a measure of both strength and ductility. This chapter describes the fracture and toughness characteristics of metals and their effect on component lifetime and failure. It begins with a review of the ductile-to-brittle transition behavior of steel and the different ways to measure transition temperature. It then explains how to predict fracture loads using linear-elastic fracture mechanics and how toughness is affected by temperature and strain rate as well as grain size, inclusion content, and impurities. It also presents the theory and use of elastic-plastic fracture mechanics and discusses the causes, effects, and control of temper embrittlement in various types of steel.

Large-scale yielding at the crack tip and time-dependent crack growth mechanisms, such as stress relaxation due to creep, are nonlinear behaviors requiring nonlinear analysis methods. This chapter presents two such methods, one based on elastic-plastic fracture mechanics, the other on time-dependent fracture mechanics. It also introduces two new fracture indices, the J-integral for handling large-scale yielding and the C*-integral for creep crack growth, providing close-form and handbook solutions for each.

Recent trends in electronic packaging, including the growing use of 3D designs and heterogeneous integration, are greatly adding to the complexity of isolating faults in semiconductor products. This chapter reviews the latest IC packaging and integration solutions and assesses the readiness level of fault isolation tools and techniques. It examines the capabilities, limitations, and optimization potential of x-ray tomography and magnetic field imaging, describes various approaches for optical fault isolation, and compares and contrasts pre-OFI sample preparation methods. The chapter also explains how time-domain and electro-optical terahertz pulse reflectometry are used to find shorts and opens in ICs and how challenges related to heterogenous integration may be met through design for testability (DFT) and built-in self-test (BIST) accommodations and the use of passive interposers.

This chapter presents an overview of microprocessor and application specific integrated circuit (IC) testing. It begins with a description of key industry trends that will impact how ICs will be tested in the future. Next, it provides a brief description of the most common tests applied in the IC industry, where technical issues that are causing methodology changes are emphasized. These include functional testing, structural testing, scan-based delay testing, built-in self-testing, memory testing, analog circuit testing, system-on-a-chip testing, and reliability testing. Trends discussed have driven the development of novel focus areas in test and the chapter discusses several of those areas, including test data volume containment, test power containment, and novel methods of defect-based test.

This chapter assesses the capabilities and limitations of electric fault isolation (EFI) technology, the measurement challenges associated with new device architectures, and the pathways for improvement in emission microscopy, laser stimulation, and optical probing. It also assesses the factors that influence signal strength, spatial and timing resolution, and alignment accuracy between signal response images and the physical layout of the IC.

This chapter discusses the various failure analysis techniques for microelectromechanical systems (MEMS), focusing on conventional semiconductor manufacturing processes and materials. The discussion begins with a section describing the advances in integration and packaging technologies that have helped drive the further proliferation of MEMS devices in the marketplace. It then shows some examples of the top MEMS applications and quickly discusses the fundamentals of their workings. The next section describes common failure mechanisms along with techniques and challenges in identifying them. The chapter also provides information on the testing of MEMS devices. It covers the two common challenges in sample preparation for MEMS: decapping, or opening up the package, without disturbing the MEMS elements; and removing MEMS elements for analysis. Finally, the chapter discusses the aspects of failure analysis techniques that are of particular interest to MEMS.

In embedded systems, the separation between system level, board level, and individual component level failure analysis is slowly disappearing. In order to localize the initial defect area, prepare the sample for root cause analysis, and image the exact root cause, the overall functionality has to be maintained during the process. This leads to the requirement of adding additional techniques that help isolate and image defects that are buried deeply within the board structure. This article demonstrates an approach of advanced board level failure analysis by using several non-destructive localization techniques. The techniques considered for advanced fault isolation are magnetic current imaging for shorts and opens; infrared thermography for electrical shorts; time-domain-reflectometry for shorts and opens; scanning acoustic microscopy; and 2D/3D X-Ray microscopy. The individual methods and their operational principles are introduced along with case studies that will show the value of using them on board level defect analysis.

This article introduces the wafer-level fault localization failure analysis (FA) process flow for an accelerated yield ramp-up of integrated circuits. It discusses the primary design considerations of a fault localization system with an emphasis on complex tester-based applications. The article presents examples that demonstrate the benefits of the enhanced wafer-level FA process. It also introduces the setup of the wafer-level fault localization system. The application of the wafer-level FA process on a 22 nm technology device failing memory test is studied and some common design limitations and their implications are discussed. The article presents a case study and finally introduces a different value-add application flow capitalizing on the wafer-level fault localization system.

This chapter sheds light on the challenges involved in diagnosing faults in analog, mixed-signal, and RF circuits. It describes some of the work being done to leverage the benefits of standardization, improve fault simulation tools, and overcome limitations on optical fault isolation techniques. One of the solutions being considered is to integrate LEDs throughout the analog circuit, thereby using light to report the status of internal signals.

X-ray imaging systems have long played a critical role in failure analysis laboratories. This article begins by listing several favorable traits that make X-rays uniquely well suited for non-destructive evaluation and testing. It then provides information on X-ray equipment and X-ray microscopy and its application in failure analysis of integrated circuit (IC) packaging and IC boards. The final section is devoted to the discussion on nanoscale 3D X-ray microscopy and its applications.

This appendix identifies producers, suppliers, and service providers experienced with superalloy materials and applications. It also identifies potential sources of engineering information and property data.

In this overview of diagnosis of scan logic and diagnosis driven failure analysis, the authors explore the world of diagnosis of digital semiconductors devices. After shortly outlining the technology behind diagnosis, the main part of this article describes key improvements to the basic diagnosis tools, discussing their merits for the failure analysis engineer. The article also describes the various requirements and other considerations that typically need to be taken into account to set up a full working scan diagnosis system. It summarizes the principles of design with embedded compression technologies. Finally, several successful industrial applications of diagnosis are presented.

Magnetic field imaging (MFI), generally understood as mapping the magnetic field of a region or object of interest using magnetic sensors, has been used for fault isolation (FI) in microelectronic circuit failure analysis for almost two decades. Developments in 3D magnetic field analysis have proven the validity of using MFI for 3D FI and 3D current mapping. This article briefly discusses the fundamentals of the technique, paying special attention to critical capabilities like sensitivity and resolution, limitations of the standard technique, sensor requirements and, in particular, the solution to the 3D problem, along with examples of its application to real failures in devices.

Many defects generate excessive heat during operation; this is due to the power dissipation associated with the excess current flow at the defect site. There are several thermal detection techniques for failure analysis and this article focuses on infrared thermography with lock-in detection, which detects an object's temperature from its infrared emission based on blackbody radiation physics. The basic principles and the interpretation of the results are reviewed. Some typical results and a series of examples illustrating the application of this technique are also shown. Brief sections are devoted to the discussion on liquid-crystal imaging and fluorescent microthermal imaging technique for thermal detection.

Laser Voltage Probing (LVP) is a key enabling technology that has matured into a well-established and essential analytical optical technique that is crucial for observing and evaluating internal circuit activity. This article begins by providing an overview on LVP history and LVP theory, providing information on electro-optical effects and free-carrier effects. It then focuses on commercially available continuous wave LVP systems. Alternative optoelectronic imaging and probing technologies for fault isolation, namely frequency mapping and laser voltage tracing, are also discussed. The subsequent section provides information on the use of Visible Laser Probing. The article closes with some common LVP observations/considerations and limitations and future work concerning LVP.