Recent trends in electronic packaging, including the growing use of 3D designs and heterogeneous integration, are greatly adding to the complexity of isolating faults in semiconductor products. This chapter reviews the latest IC packaging and integration solutions and assesses the readiness level of fault isolation tools and techniques. It examines the capabilities, limitations, and optimization potential of x-ray tomography and magnetic field imaging, describes various approaches for optical fault isolation, and compares and contrasts pre-OFI sample preparation methods. The chapter also explains how time-domain and electro-optical terahertz pulse reflectometry are used to find shorts and opens in ICs and how challenges related to heterogenous integration may be met through design for testability (DFT) and built-in self-test (BIST) accommodations and the use of passive interposers.

An architectural shift to buried power rails (BPRs) with backside power delivery (BPD) is on the horizon as CMOS technology approaches the 2 nm node. The obstruction created by the presence of BPD networks obsoletes many of the electrical fault isolation (EFI) techniques that have been used for the past few decades and severely degrades the performance of others. This chapter provides an overview of EFI methods that are still applicable to ICs with BPD networks, including e-beam and atomic force probing, x-ray and magnetic field imaging, and lock-in thermography. It assesses the technical challenges of each method as well as the potential for improvement.

This chapter assesses the potential impact of neural networks on package-level failure analysis, the challenges presented by next-generation semiconductor packages, and the measures that can be taken to maximize FA equipment uptime and throughput. It presents examples showing how neural networks have been trained to detect and classify PCB defects, improve signal-to-noise ratios in SEM images, recognize wafer failure patterns, and predict failure modes. It explains how new packaging strategies, particularly stacking and disintegration, complicate fault isolation and evaluates the ability of various imaging methods to locate defects in die stacks. It also presents best practices for sample preparation, inspection, and navigation and offers suggestions for improving the reliability and service life of tools.

As semiconductor feature sizes have shrunk, the technology needed to encapsulate modern integrated circuits has expanded. Due to the various industry changes, package failure analyses are becoming much more challenging; a systematic approach is therefore critical. This article proposes a package failure analysis flow for analyzing open and short failures. The flow begins with a review of data on how the device failed and how it was processed. Next, non-destructive techniques are performed to document the condition of the as-received units. The techniques discussed are external optical inspection, X-ray inspection, scanning acoustic microscopy, infrared (IR) microscopy, and electrical verification. The article discusses various fault isolation techniques to tackle the wide array of failure signatures, namely IR lock-in thermography, magnetic current imaging, time domain reflectometry, and electro-optical terahertz pulse reflectometry. The final step is the step-by-step inspection and deprocessing stage that begins once the defect has been imaged.

In embedded systems, the separation between system level, board level, and individual component level failure analysis is slowly disappearing. In order to localize the initial defect area, prepare the sample for root cause analysis, and image the exact root cause, the overall functionality has to be maintained during the process. This leads to the requirement of adding additional techniques that help isolate and image defects that are buried deeply within the board structure. This article demonstrates an approach of advanced board level failure analysis by using several non-destructive localization techniques. The techniques considered for advanced fault isolation are magnetic current imaging for shorts and opens; infrared thermography for electrical shorts; time-domain-reflectometry for shorts and opens; scanning acoustic microscopy; and 2D/3D X-Ray microscopy. The individual methods and their operational principles are introduced along with case studies that will show the value of using them on board level defect analysis.

X-ray imaging systems have long played a critical role in failure analysis laboratories. This article begins by listing several favorable traits that make X-rays uniquely well suited for non-destructive evaluation and testing. It then provides information on X-ray equipment and X-ray microscopy and its application in failure analysis of integrated circuit (IC) packaging and IC boards. The final section is devoted to the discussion on nanoscale 3D X-ray microscopy and its applications.

Many defects generate excessive heat during operation; this is due to the power dissipation associated with the excess current flow at the defect site. There are several thermal detection techniques for failure analysis and this article focuses on infrared thermography with lock-in detection, which detects an object's temperature from its infrared emission based on blackbody radiation physics. The basic principles and the interpretation of the results are reviewed. Some typical results and a series of examples illustrating the application of this technique are also shown. Brief sections are devoted to the discussion on liquid-crystal imaging and fluorescent microthermal imaging technique for thermal detection.

This chapter describes three approaches for 3D hot-spot localization of thermally active defects by lock-in thermography (LIT). In the first section, phase-shift analysis for analyzing stacked die packages is performed. The second example employs defocusing sequences for the localization of resistive electrical shorts in 3D architectures, and the third operates in cross sectional LIT mode to investigate defects in the insulation liner of Through Silicon Vias. All three approaches allow for a precise localization of thermally active defects in all three spatial dimensions to guide subsequent high-resolution physical analyses.

The ultimate goal of the failure analysis process is to find physical evidence that can identify the root cause of the failure. Transmission electron microscopy (TEM) has emerged as a powerful tool to characterize subtle defects. This article discusses the sample preparation procedures based on focused ion beam milling used for TEM sample preparation. It describes the principles behind commonly used imaging modes in semiconductor failure analysis and how these operation modes can be utilized to selectively maximize signal from specific beam-specimen interactions to generate useful information about the defect. Various elemental analysis techniques, namely energy dispersive spectroscopy, electron energy loss spectroscopy, and energy-filtered TEM, are described using examples encountered in failure analysis. The origin of different image contrast mechanisms, their interpretation, and analytical techniques for composition analysis are discussed. The article also provides information on the use of off-axis electron holography technique in failure analysis.

Post-mortem analysis of photovoltaic modules that have degraded performance is essential for improving the long term durability of solar energy. This article focuses on a general procedure for analyzing a failed module. The procedure includes electrical characterization followed by thermal imaging such as forward bias, reverse bias, and lock-in, and emission imaging such as electroluminescence and photoluminescence imaging.

The complexity of semiconductor chips and their packages has continuously challenged the known methods to analyze them. With larger laminates and the inclusion of multiple stacked die, methods to analyze modern semiconductor products are being pushed toward their limits to support these 2.5D and 3D packages. This article focuses on these methods of fault isolation, non-destructive imaging, and destructive techniques through an iterative process for failure analysis of complex packages.

Most of the counterfeit parts detected in the electronics industry are either novel or surplus parts or salvaged scrap parts. This article begins by discussing the type of parts used to create counterfeits. It discusses the three most commonly used methods used by counterfeiters to create counterfeits. These include relabeling, refurbishing, and repackaging. The article presents a systematic inspection methodology that can be applied for detecting signs of possible part modifications. The methodology consists of external visual inspection, marking permanency tests, and X-ray inspection followed by material evaluation and characterization. These processes are typically followed by evaluation of the packages to identify defects, degradations, and failure mechanisms that are caused by the processes (e.g., cleaning, solder dipping of leads, reballing) used in creating counterfeit parts.

This chapter describes nondestructive evaluation (NDE) test methods and their relative effectiveness for diagnosing the cause of stress-corrosion cracking (SCC) service failures. It discusses procedures for analyzing various types of damage in carbon and low-alloy steels, high-strength low-alloy steels, hardenable stainless steels, austenitic stainless steels, copper-base alloys, titanium and titanium alloys, aluminum and aluminum alloys, and nickel and nickel alloys. It identifies material-environment combinations where SCC is known to occur, provides guidelines on how to characterize cracking and fracture damage, and explains what to look for during macroscopic and microscopic examinations as well as chemical and metallographic analyses. It also includes nearly a dozen case studies investigating SCC failures in various materials.

This chapter discusses the methods and procedures used for inspecting induction-hardened parts. It provides information on hardness and case depth measurements, nondestructive testing and surface analysis, the effect of various hardening errors, and relevant test standards.

This chapter provides an overview of the various inspection methods used with metals and alloys, namely visual inspection, coordinate measuring machines, machine vision, hardness testing, tensile testing, chemical analysis, metallography, and nondestructive testing. The nondestructive testing methods discussed are liquid penetrant inspection, magnetic particle inspection, eddy current inspection, radiographic inspection, and ultrasonic testing.

Visual inspection is the most important method of inspection of materials. This chapter describes the procedures involved in visual inspection such as identification markings, identification of defects caused by heating problems, scaling of materials, cracking characterization, and measurement of material dimensions. It discusses the mechanisms, advantages, limitations, components, and applications of various visual inspection tools, namely magnifying devices, lighting for visual inspection, measuring devices, miscellaneous measuring equipment, record-keeping devices, and macroetching.