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1-3 of 3
Z. H. Lee
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Proceedings Papers
ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 235-238, November 6–10, 2005,
Abstract
View Papertitled, Gate Oxide Defect Localization and Analysis by Using Conductive Atomic Force Microscopy
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for content titled, Gate Oxide Defect Localization and Analysis by Using Conductive Atomic Force Microscopy
This paper describes gate oxide defect localization and analysis using passive voltage contrast (PVC) and conductive atomic force microscopy (C-AFM) in a real product through two case studies. In this paper, 10% wt KOH was used to etch poly-Si and expose gate oxide. In the case studies, different types of gate oxide defects will cause different leakage paths. According to the I-V curve measured by C-AFM, we can distinguish between short mode and gate oxide related leakage. For gate oxide leakage, KOH wet etching was successfully used to identify the gate oxide pinholes.
Proceedings Papers
ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 241-244, November 6–10, 2005,
Abstract
View Papertitled, The Enhancement of Abnormal Photon Emission Identification for Advanced Processes using a Backside Cooling PEM System
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for content titled, The Enhancement of Abnormal Photon Emission Identification for Advanced Processes using a Backside Cooling PEM System
Modern semiconductor devices are continuing to be scaled down and the complexity of the processes involved in producing the devices keeps increasing, in conjunction with this, sample preparation and analysis are increasingly important for accurately determining the sources of defects and failure mechanisms in terms of process integration. This paper discusses ways to characterize integration-driven defects using deprocessing techniques and cross-section imaging to obtain 3-D views of such defects. As an example a single-via test structure is evaluated. The article focuses on the techniques used to deprocess the single-via structure using a combination of RIE, FIB, and wet etching to expose the single via while maintaining the integrity of the structure. The resulting 3-D view of the structure and associated defect allowed for improved understanding of the defect and its origin. This understanding enabled process optimization to minimize such defect formation.
Proceedings Papers
ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 479-483, November 6–10, 2005,
Abstract
View Papertitled, The Study and Methodology of Defects Isolation For Contacts of Non-Isolated Active Region on New Logic Designs
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for content titled, The Study and Methodology of Defects Isolation For Contacts of Non-Isolated Active Region on New Logic Designs
With the advancement in technology and lower operating voltage, new standards have evolved in circuit layout and design. Some of these new standards have increased the difficulties of the physical failure analysis process, especially on the front-end. The phenomenon described in this paper is the unusual voltage contrast (VC) and conductive atomic force microscope (C-AFM) curve on a non-isolated active region. The model and mechanism are demonstrated for front-end failure analysis. Based on this, the solution for analysis is investigated.