Laser Voltage Imaging (LVI) is a new application developed from Laser Voltage Probing (LVP). Most LVP applications have focused on design debug or design characterization, and are seldom used for global functional failure analysis. LVI enables the failure analysis engineer to utilize laser probing techniques in the failure analysis realm. In this paper, we present LVI as an emerging FA technique. We will discuss setting up an LVI acquisition and present its current challenges. Finally, we will present an LVI application in the form of a case study.

Innovations in semiconductor fabrication processes have driven process shrinks partly to fulfill the need for low power, system-on-chip (SOC) devices. As the process is innovated, it influences the related design debug and failure analysis which have gone through many changes. Historically for signal probing, engineers analyzed signals from metal layers by using e-beam probing methods [1]. But due to the increased number of metal layers and the introduction of flip chip packages, new signal probing systems were developed which used time resolved photon emission (TRE) to measure signals through the backside. However, as the fabrication process technology continues to shrink, the operating voltage drops as well. When the operating voltage drops below 1.0V, signal probing systems using TRE find it harder to detect the signals [2]. Fortunately, Laser Voltage Probing (LVP) technology [3] is capable of probing beyond this limitation of TRE. In this paper, we used an LVP system to analyze and identify a functional shmoo hole failure. We also proposed the design change to prevent its reoccurrence.

We present an overview of Ruby, the latest generation of backside optical laser voltage probing (LVP) tools [1, 2]. Carrying over from the previous generation of IDS2700 systems, Ruby is capable of measuring waveforms up to 15GHz at low core voltages 0.500V and below. Several new optical capabilities are incorporated; these include a solid immersion lens (SIL) for improved imaging resolution [3] and a polarization difference probing (PDP) optical platform [4] for phase modulation detection. New developments involve Jitter Mitigation, a scheme that allows measurements of jittery signals from circuits that are internally driven by the IC’s onboard Phase Locked Loop (PLL). Additional timing features include a Hardware Phase-Locked Loop (HWPLL) scheme for improved locking of the LVP’s Mode-Locked Laser (MLL) to the tester clock as well as a clockless scheme to improve the LVP’s usefulness and user friendliness. This paper presents these new capabilities and compares these with those of the previous generation of LVP systems [5, 6].