The power device has a vertical structure and analysis of defective products generally occurs from the backside because the surface is covered in an aluminum electrode and the backside in a metallic electrode. We will discuss the development of backside 3D analysis technique using defective products that emerged due to the marginal valuation of the power device development. First, it was verified that applying a DC voltage uniformly to the entire backside would be effective in placing a glass with an ITO (Indium Tin Oxide) transparent electrode in contact with the backside; therefore it was able to specify a failure point using the IR-OBIRCH (Infra Red-Optical Beam Induced Resistance CHange) method [1]. Then, a micro-sample was extracted without missing the failure point and observed the 3D perspective method; thus it was clear that existence of crystal lattice defects were thought about as the cause of failure.

In the automotive IC using thick-film silicon on insulator (SOI) semiconductor device, if the gettering capability of a SOI wafer is inadequate, electrical characteristics degradation by metal contamination arises and the yield falls. At this time, an automotive IC was made experimentally for evaluation of the gettering capability as one of the purposes. In this IC, one of the output characteristics varied from the standard, therefore failure analysis was performed, which found trace metal elements as one of the causes. By making full use of 3D perspective, it is possible to fabricate a site-specific sample into 0.1 micrometre in thickness without missing a failure point that has very minute quantities of contaminant in a semiconductor device. Using energy dispersive X-ray, it is possible to detect trace metal contamination at levels 1E12 atoms per sq cm. that are conventionally detected only by trace element analysis.