With a focus on open failure candidates, an extra effort in defining the ease of physical failure analysis (PFA) processing is taken in this paper by closely modeling the PFA processing flow and detailed estimation of the processing cost involved in every step is made. The paper begins with a discussion on the general PFA procedure to process open failure candidates in logic circuits. This is followed by a section that reviews common practice in PFA candidate selection, before proposing the comprehensive selection flow that aims to filter out the easiest candidate in terms of processing cost. This methodology is then evaluated by several case studies and is followed by a discussion on the potential future work. Case studies show that the cost model closely matches with real-world PFA turnaround time and the authors are working toward automating the full flow in software to further improve the efficiency.

The root cause deconvolution (RCD) provides an easy-to-understand defect Pareto, together with targeted physical failure analysis candidates. Unfortunately, even the RCD analysis also has some assumptions and limitations, and its result cannot always be interpreted literally. This calls for a variety of conventional yield analysis techniques to be adopted in parallel to improve the confidence in the RCD results. This paper briefly introduces the RCD analysis and explains how it distinguishes itself from other conventional volume diagnosis analysis techniques. Its typical inputs and outputs are discussed as well. Next, the paper focuses on two case studies where the authors leverage RCD for logic yield improvement together with other conventional analysis techniques. It then proposes a comprehensive analysis system that is backed up by accumulating RCD results over time and across different design IPs.