In many cases, the leakage is relatively small and tends to spread out over a relatively large area. While diagnostic techniques using laser stimulation, such as OBIRCH, or photoemission are powerful in identifying localized defects in silicon crystal and backend metal layers, they are found to be not as sensitive in isolating charge induced leakage. This paper presents a case study of dielectric charge induced leakage in a high voltage ESD device. In this case, conventional photoemission and laser probing diagnostic techniques were not able to localize leakage sites. By using atomic force probing for detailed electrical characterization of individual devices, experimenting with UV radiation, and SCM 2D dopant profiling analysis, it showed that trapped charges in dielectric layers cause leakage near silicon surface. Based on the finding, the FAB fixed the issue by implementing UV bake in the process.

Embedded non-volatile memory (NVM) technologies are used in almost all areas of semiconductor chip applications, as it becomes increasingly vital to retain information when the electronics power is off. Nano-probing techniques, such as atomic force probe (AFP), allow us to access individual devices at contact or via levels and characterize the details as much as possible before a decision can be made for physical analysis. This paper reports the application of AFP to characterize each individual bit at contact level or individual column at via1 level. It presents two cases to identify the failures encountered in fabricated embedded NVM: column-column leakage and single bit erase failure. The first case shows that silicide residual could cause column to column leakage by creating electrical path between active areas of adjacent columns, while the second case shows that single bit failures due to low erase current can be recovered with repeated program/erase cycle.

Identifying defects in marginally failed vias has long been a challenge for failure analysis (FA) of state-of-the-art semiconductor integrated circuits. This paper presents two cases where a conventional FA approach is found to not be effective. The first case involves high resistance or marginally open vias. The second case involves early breakdown of large capacitors. The large size of the capacitor and the lack of ways to track electrical flow during diagnosis made it difficult to isolate the defect. The paper shows that conducting atomic force microscopy (C-AFM) and scanning capacitance microscopy (SCM) are effective techniques for isolation of via-related defects. The SCM technique could be applied to samples without a direct conducting path to the substrate, such as SOI samples. On the other hand, C-AFM allows current imaging as well as I-V characterization whenever a direct conductive path is available.

Threshold voltage (Vt) shift was measured, using atomic force probing (AFP) technique, in the pullup PFETs of high density SRAM bitcell arrays in 90nm CMOS bulk technology. This shift caused catastrophic yield loss. The direct measurements of dopant distribution both in plan view and x-section using Scanning Capacitance Microscopy (SCM) technique suggested counter doping of the P-poly had occurred. A single mask modification was shown to validate the observation and eliminated the counter doping resulting in drastic yield enhancement to about 60% from nearly no yield.

In this paper, we present our recent applications of scanning capacitance microscopy (SCM) on specific devices with sampling window as small as 100nm. The dopant related root causes were successfully identified on those devices fabricated with 90nm CMOS technology. The key step in our approach is the development of a sample preparation technique that allows us to precisely x-section through a transistor without being affected by focused ion beam (FIB) artifacts. FIB was used to mark the area of interest with high precision, but it did not expose the devices of interest. Optical microscope and atomic force microscope (AFM) were used to inspect the mechanically polished surface, thus avoiding beam effects from FIB or SEM. In the first application, a doping anomaly was identified in a PFET poly gate, in a single bit failed SRAM cell. In the second application, an asymmetry of a PWell implant profile in a window of 150nm was identified as the cause of leakage in a capacitor array. Our approach may be applied to other scanning probe microscopy (SPM) techniques in the same category, i.e., scanning spreading resistance microscopy (SSRM) or scanning microwave microscopy (SMM).