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1-3 of 3
Venkat Ravikumar
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Proceedings Papers
ISTFA2024, ISTFA 2024: Tutorial Presentations from the 50th International Symposium for Testing and Failure Analysis, g1-g42, October 28–November 1, 2024,
Proceedings Papers
ISTFA2023, ISTFA 2023: Tutorial Presentations from the 49th International Symposium for Testing and Failure Analysis, f1-f45, November 12–16, 2023,
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Presentation slides for the ISTFA 2023 Tutorial session “Laser Probing-Theory, Applications, and State-of-Art.”
Proceedings Papers
ISTFA2022, ISTFA 2022: Conference Proceedings from the 48th International Symposium for Testing and Failure Analysis, 120-124, October 30–November 3, 2022,
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Infrared lock-in thermography systems are frequently utilized for non-destructive failure analysis of integrated circuits due to sensitivity of the thermal detector to small temperature changes from electrical activity. This thermal sensitivity can also be leveraged for design verification and debug of device thermal management via absolute temperature mapping. The application of temperature mapping to a device under test (DUT) that requires boards and sockets, such as in tester based applications, has traditionally been challenging, due to the requirement that the DUT not be moved and the difficulty of heating the DUT through the thermal mass of the boards and sockets to which the DUT is mounted. This paper describes a proposed alternative single-temperature in-situ calibration method to eliminate the need for a heated thermal chuck for absolute temperature mapping. Preliminary results are promising and show that the new alternative single-temperature in-situ method results in temperature measurements within 1 °C close to room temperature and within 2.5 °C at elevated temperatures up to approximately 75 °C, as compared to the 1 °C accuracy of the current standard two-temperature in-situ method. While this alternate method is not as accurate as the standard two-temperature in-situ calibration method, the fact that it can be performed at a single room temperature means that it enables absolute temperature mapping for use cases requiring boards or socketed DUTs, as is the case for tester applications. An example characterization of a DUT utilizing varying clock signal inputs shows the added flexibility and ease of setup that the alternative single-temperature workflow brings, creating new opportunities for use-cases such as boards and testers where the use of a heated thermal chuck is not viable.