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Stas Polonsky
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Proceedings Papers
ISTFA2009, ISTFA 2009: Conference Proceedings from the 35th International Symposium for Testing and Failure Analysis, 208-213, November 15–19, 2009,
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We compare different dc current-based integrated capacitance measurement techniques in terms of their applicability to modern CMOS technologies. The winning approach uses quadrature detection to measure mutual Front-End-Of-Line (FEOL) and Back-End-Of-Line (BEOL) capacitances. We describe our implementation of this approach, Quadrature-clocked Voltage-dependent Capacitance Measurements (QVCM), and its application to 45 nm node BEOL: wire capacitance variability measurements for analog design, and capacitive test structure to measure the effect of metal pattern density on Chemical-Mechanical Polishing (CMP) and Reactive Ion Etching (RIE).
Journal Articles
Journal: EDFA Technical Articles
EDFA Technical Articles (2005) 7 (3): 14–21.
Published: 01 August 2005
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Off-state leakage currents account for roughly half of the total current is today’s ICs, and with each new generation of technology, the problem is getting worse. Failure analysts, however, see things differently. Light emission associated with leakage current is a rich source of information about the operation of ICs. In this article, the authors explain how they use this light to monitor logic states, measure temperatures, analyze cross-talk and power distribution noise, and diagnose broken scan chains. Light emission from off-state leakage current (LEOSLC) is shown to be especially useful for diagnosing faults that reside in scan clock trees, which are otherwise very difficult to detect.
Proceedings Papers
ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 387-390, November 3–7, 2002,
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The light emission from ever increasing OFF-state leakage currents in advanced CMOS technologies can now be reliably measured using existing photon detectors. The measurements of such an emission provide valuable information about the operation of ICs. In this paper we suggest and experimentally confirm two new techniques based on such measurements - Transient Logic State Detection and Power Supply Noise Analysis.
Proceedings Papers
ISTFA1999, ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis, 35-38, November 14–18, 1999,
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Picosecond Imaging Circuit Analysis (PICA) is a new technique shown here to be applicable to the analysis of complex VLSI circuits. PICA was used to diagnose a timing failure in the early design of the G6 microprocessor chip. The fault occurred at high frequencies upon consecutive writes. Using PICA, combined with programmable array built-in self test (RAMBIST) techniques, the problem was traced to a race condition in the write control circuits. This allowed timely correction of the design for product implementation.