In this work, we present TEM failure analysis of two typical failure cases related to metal voiding in Cu BEOL processes. To understand the root cause behind the Cu void formation, we performed detailed TEM failure analysis for the phase and microstructure characterization by various TEM techniques such as EDX, EELS mapping and electron diffraction analysis. In the failure case study I, the Cu void formation was found to be due to the oxidation of the Cu seed layer which led to the incomplete Cu plating and thus voiding at the via bottom. While in failure case study II, the voiding at Cu metal surface was related to Cu CMP process drift and surface oxidation of Cu metal at alkaline condition during the final CMP process.

In wafer fabrication, Fluorine (F) contamination may cause fluorine-induced corrosion and defects on microchip Aluminum (Al) bondpads, resulting in bondpad discoloration or non-stick on pads (NSOP). Auger Electron Spectroscopy (AES) is employed for measurements of the fluorine level on the Al bondpads. From a Process control limit and a specification limit perspective, it is necessary to establish a control limit to enable process monitor reasons. Control limits are typically lower than the specification limits which are related to bondpad quality. The bondpad quality affects the die bondability. This paper proposes a simulation method to determine the specification limit of Fluorine and a Shelf Lifetime Accelerated Test (SLAT) for process monitoring. Wafers with different F levels were selected to perform SLAT with high temperature and high relative humidity tests for a fixed duration to simulate a one year wafer storage condition. The results of these simulation results agree with published values. If the F level on bondpad surfaces was less than 6.0 atomic percent (at%), then no F induced corrosion on the bond pads was observed by AES. Similarly, if the F level on bond pad surfaces was higher than 6.0 atomic per cent (at%) then AES measured F induced corrosion was observed.

The distribution of Si nanoparticles, both dimensional and spatial, is a key factor affecting the performance of non-volatile flash memory devices. A new FIB method has been developed to prepare ultra-thin plan view specimens, containing only the Si nanoparticle matrix thin film layer, from fully processed nanocrystalline flash memory devices. The morphology and distribution of Si nanoparticles were then studied by EFTEM 3D tomographic reconstruction.