This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.

New process will introduce new failure mechanisms during microelectronic device manufacturing. Even if the same defect, its root causes can be different for different processes. For aluminum(Al)-tungsten(W) metallization, the root cause of metal bridging is quite simple and mostly it is blocked etch or under-etch. But, for copper damascene process, the root causes of metal bridging are complicated. This paper has discussed the various root causes of metal bridging for copper damascene process, such as those related to litho-etch issue, copper CMP issue, copper corrosion issue and so on.