This paper aims to discuss the processes involved in establishing a more rapid approach in exposing the polyfuse and thin film fuse using the reactive ion etching, chemical deprocessing and parallel lapping techniques. The results proved that parallel lapping technique in combination with chemical deprocessing and reactive ion etching is a faster approach in exposing the physical status of the fuses.

This paper describes how scanning acoustic microscopy can be used to inspect materials under the chamfer of electronic device packages. The technique involves the use of copper tape to locate the areas affected by the chamfer during X-ray radiography. The results are then correlated with known critical package and assembly geometries to determine how far parallel lapping should proceed to ensure that the areas of interest will become observable under acoustic microscopy without interfering with the functionality of the device.

Most Wafer Level Chip Scale Package (WLCSP) units returned by customers for failure analysis are mounted on PCB modules with an epoxy underfill coating. The biggest challenge in failure analysis is the sample preparation to remove the WLCSP device from the PCB without inducing any mechanical defect. This includes the removal of the underfill material to enable further electrical verification and fault isolation analysis. This paper discusses the evaluations conducted in establishing the WLCSP demounting process and removal of the epoxy underfill coating. Combinations of different sample preparation techniques and physical failure analysis steps were evaluated. The established process enabled the electrical verification, fault isolation and further destructive analysis of WLCSP customer returns mounted on PCB and with an epoxy underfill coating material. This paper will also showcase some actual full failure analysis of WLCSP customer returns where the established process played a vital role in finding the failure mechanism.