The potential benefits and challenges of low kV SEM imaging and EDS elemental analysis have been discussed in the SEM community since at least the early 1990s [1,2]. Concurrent with steady progress in the performance of so-called extreme high-resolution ‘XHR’ SEM imaging [3], is an advancement in low-energy EDS using windowless, large solid angle ‘racetrack’ EDS detectors [4]. As lower kV imaging and EDS analysis becomes accessible, refined models of the interaction of low energy electron beam and real-world samples continues at full speed even today [5].

The result of applying normal xenon ion beam milling combined with patented DX chemistry to delayer state-of-theart commercial-grade 14nm finFETs has been demonstrated in a Helios Plasma FIB DualBeam™. AFM, Conductive-AFM and nano-probing with the Hyperion Atomic Force nanoProber™ were used to confirm the capability of the Helios PFIB DualBeam to delayer samples from metal-6 down to metal-0/local interconnect layer and in under two hours produce a sample that is compatible with the fault isolation, redetection, and characterization capabilities of the AFP. IV (current-voltage) curves were obtained from representative metal-0 contacts exposed by the PFIB+DX delayering process and no degradation to device parameters was uncovered in the experiments that were run. Compared to mechanically delayering samples, the many benefits of using the PFIB+DX process to delayer samples for nano-probing were conclusively demonstrated. Such benefits, include sitespecificity, precise control over the amount of material removed, >100μm square DUT (device under test) area, nm-scale flatness over the DUT area, nm-scale topography between contacts and the surrounding ILD, uniform conductivity across the DUT area, all with no obvious detrimental effects on typical DC device parameters measured by nano-probing.

A Plasma-source focused ion beam (Helios PFIB) DualBeam™ microscope with sub-nanometer 1kV SEM resolution was used to investigate the structure of a state-of-the-art organic light-emitting diode (OLED) display. The capability of the Helios PFIB to produce and manipulate millimeter-scale samples for wide field-of-view crosssectional SEM analyses was demonstrated by lifting out a 570μm long by 40μm wide x 10μm deep and mounting it on a copper half-grid. An angled face was cut into the chunk and high-resolution back-scattered SEM tiles across the entire exposed face were automatically acquired within a modular automated processing system (MAPS).

Semiconductor devices with critical dimensions less than 20nm are now being manufactured in volume. A challenge facing the failure analysis and process-monitoring community is two-fold. The first challenge of TEM sample prep of such small devices is that the basic need to end-point on a feature-of-interest pushes the imaging limit of the instrument being used to prepare the lamella. The second challenge posed by advanced devices is to prepare an artifact-free lamella from non-planar devices such as finFETs as well as from structures incorporating ‘non-traditional’ materials. These challenges are presently overcome in many advanced logic and memory devices in the focused ion beam-based TEM sample preparation processes by inverting the specimen prior to thinning to electron transparency. This paper reports a highthroughput method for the routine preparation of artifact-free TEM lamella of 20nm thickness, or less.