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Richard S. Flores
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Proceedings Papers

Pseudo-Soft Defect Localization

Paiboon Tangyunyong, Rick McFarland, Richard S. Flores, Sean Pearson, Marco O. Sanchez
ISTFA2009, ISTFA 2009: Conference Proceedings from the 35th International Symposium for Testing and Failure Analysis, 38-42, November 15–19, 2009,
https://doi.org/10.31399/asm.cp.istfa2009p0038
Abstract
In this paper, we describe a modified soft defect localization (SDL) technique, PSDL (pseudo-soft defect localization), to localize pseudo-soft defects in integrated circuits (ICs). Similar to soft defects, functional failures due to pseudo-soft defects are sensitive to operating parameters (such as voltages, frequencies and temperatures) and/or laser exposures. Pass/fail states in pseudo soft defect failures are, however, not fully reversible after laser exposure or after changing operating parameters. PSDL uses the methodology of conventional SDL and/or TIVA in combination with a new scanning scheme for defect localization. An example will be shown to demonstrate the use of this technique to localize pseudo-soft defects.
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Journal Articles

A Radiation-Hardened Structured ASIC

Richard S. Flores
Journal: EDFA Technical Articles
EDFA Technical Articles (2006) 8 (2): 28–34.
DOI: https://doi.org/10.31399/asm.edfa.2006-2.p028
Published: 01 May 2006
Abstract
Government and military ICs, like their commercial counterparts, are subject to ever-tightening cost, performance, and time-to-market demands. They must also comply with strict lifetime, reliability, and radiation hardness standards. In dealing with these challenges for internal applications, engineers at Sandia National Laboratories developed a radiation-hardened structured ASIC platform. In this article, they describe the design and development of the platform and the associated challenges for FA and test.
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Journal Articles

Focused Ion Beam (FIB) Tunable Circuits

Richard S. Flores
Journal: EDFA Technical Articles
EDFA Technical Articles (2004) 6 (2): 6–11.
DOI: https://doi.org/10.31399/asm.edfa.2004-2.p006
Published: 01 May 2004
Abstract
This article explains how the addition of FIB tunable circuits in critical paths on ICs can alleviate some of the challenges encountered during the implementation of mixed-signal ASICs. It walks readers through the implementation of a particular digital ASIC, explaining where and how FIB tunable circuits were used to overcome difficulties, resolve problems, and realize a fully functional chip that met all system specifications on the first pass of the design.
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