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Qiang Guo
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Proceedings Papers
Fundamental Study of Al Pad Grain Size Measurement and Its Effectiveness
Available to Purchase
ISTFA2010, ISTFA 2010: Conference Proceedings from the 36th International Symposium for Testing and Failure Analysis, 271-274, November 14–18, 2010,
Abstract
View Papertitled, Fundamental Study of Al Pad Grain Size Measurement and Its Effectiveness
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Grain size monitor of Al pad is necessary to assure pad quality and electrical performance in IC manufacturing. Currently, the sample is prepared either without pretreatment or with 4.9% HF stain or ion milling before grain size measurement. In this paper, we demonstrate the pretreatment has a pronounced effect on the grain size measurement and the method with ion milling pretreatment shows more reliable results. The mechanism is further discussed.
Proceedings Papers
Failure Analysis for Gate Oxide Breakdown
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ISTFA2008, ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis, 88-91, November 2–6, 2008,
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Damage-free gate oxide is one of the important factors to ensure device performance and reliability. Special wafer accepts test structures such as a large size MOS capacitor must be laid on test line to monitor the oxide process issue and process window. However, it brings about many challenges to failure analysis engineer. To overcome the EFA and PFA limitations, fresh samples were taken from the passed wafer and the failed ones to identify the root cause of VBD failure. A novel lapping down method was used to access the capacitor structure. Two VBD failure cases were studied. In this study, poor wet clean process was defined as the cause of the silicon substrate surface damage and crystalline defect. It induced poor oxide deposition, which reduced breakdown voltage. Additionally, 12hrs BOE dip was shown to be an effective method for removing poly and oxide layers from large MOS capacitors.
Proceedings Papers
Development of PECS Application for Sample Preparation
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ISTFA2008, ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis, 277-279, November 2–6, 2008,
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Cross-sectional polishing has been widely used in the semiconductor industry. As demand for higher throughput increases, the time spent manually performing a final polish is an improper method for cross-section preparation. Etching is the major function of Precise Etching and Coating System (PECS). In this article, the focus is on Ar plasma cleaning performance on a sample after rough polishing and a sample after a short time final polishing using PECS. To evaluate performance of Ar plasma cleaning, two samples were prepared for SEM observation. X-SEM images before and after Ar plasma cleaning revealed that Ar plasma cleaning is not an effective method to correct micro scratches. The combination of final polishing and stain into one step was found to improve sample quality and throughput. PECS Ar plasma was found to be an effective sample cleaning method when compared to the time spent on final polishing.