Continued advancements in the architecture of 3D packaging have increased the challenges in fault isolation and failure analysis (FA), often requiring complex correlative workflows and multiple inference-based methods before targeted root cause analysis (RCA) can be performed. Furthermore, 3D package components such as through-silicon-vias (TSVs) and micro-bumps require sub-surface structural characterization and metrology to aid in process monitoring and development throughout fabrication and integration. Package road-mapping has also called for increased die stacking with decreased pitch, TSV size, and die thickness, and thus requires increased accuracy and precision of various stateof- the-art analytical techniques in the near future. Physical failure analysis (PFA), process monitoring, and process development will therefore depend on reliable, high-resolution data directly measured at the region of interest (ROI) to meet the complexity and scaling challenges. This paper explores the successful application of plasma-FIB (PFIB)/SEM techniques in 2D and 3D regimes and introduces diagonal serial sectioning at package scales as a novel approach for PFA and metrology. Both 2D and 3D analysis will be demonstrated in a high bandwidth memory (HBM) package case-study which can be applied more broadly in 3D packaging.

With manufacturers now capable of creating transistors in the 5-7 nm node range, the ability to isolate, inspect, and probe individual metal and via layers is of the utmost importance for defect inspection and design validation. These isolated layers can be inspected for defects via SEM, provide design validation, or tested with electrical probing for failure analysis. The work herein describes a functional workflow that enables manufacturers to perform this kind of sample preparation in an automated fashion using plasma focused ion beam (FIB) technology. The workflow is scalable and can be used in both lab and fabrication environments.

We report on using the voltage-contrast mechanism of a scanning electron microscope to probe electrical waveforms on FinFET transistors that are located within active integrated circuits. The FinFET devices are accessed from the backside of the integrated circuit, enabling electrical activity on any transistor within a working device to be probed. We demonstrate gigahertz-bandwidth probing at 10-nm resolution using a stroboscopic pulsed electron source.

Good control over beam and chemistry conditions are required to enable uniform delayering of advanced process technologies in the FIB. The introduction of newer, thinner and more beam sensitive materials have made delayering more complicated. We shall introduce a new chemistry for device delayering and present results from both Ga and Xe ion beams showing its improvement over existing chemistries.