The ability to precisely remove the internal structures of a semiconductor device, layer-by-layer, is a necessity for semiconductor research and failure analysis investigation. Currently, numerous techniques are used, such as mechanical polishing, chemical etching, and gas assisted plasma focused ion beam (FIB) milling. However, all of these techniques have limitations in that they are unable to: (1) delayer a millimeter-scale area with nanometer-scale uniformity, (2) rapidly remove thick (>300 nm) device layers, or (3) perform automatic and accurate end pointing, which is challenging on thin (≤300 nm) device layers.

Semiconductor devices are decreasing in dimensions and currently comprise stacks of ultrathin layers as in a spin-transfer torque magnetoresistive random-access memory (STTMRAM) device. For successful characterization by transmission electron microscopy (TEM) for failure analysis and device development, an accurate and controllable thinning of TEM specimens for is desirable. In this work, we combine plan view Ga focused ion beam (FIB) and post-FIB Ar milling preparation to prepare TEM specimens from a STT-MRAM device. Post-FIB Ar milling technique as a final polishing step of plan view TEM specimens was shown to prevent exposure of the tunnel barrier layer that can be damaged by the Ga FIB beam. We discuss the plan view FIB preparation, post-FIB Ar milling step and image analysis of the TEM images.

We describe a fully integrated solution for millimeter-scale delayering of both logic and memory semiconductor devices. The flatness of the delayered device is controlled by an artificial intelligence algorithm, which uses feedback from multiple analytical detectors to control milling parameter adjustments in real time. The result is the precise removal of device layers and a highly planar surface.

This paper describes an accurate and controllable delayering process to target defects in new materials and device structures. The workflow is a three-step process consisting of bulk device delayering by broad Ar ion beam milling, followed by plan view specimen preparation using a focused ion beam, then site-specific delayering via concentrated Ar ion beam milling. The end result is a precisely delayered device without sample preparation-induced artifacts suitable for identifying defects during physical failure analysis.

Fast and accurate examination from the bulk to the specific area of the defect in advanced semiconductor devices is critical in failure analysis. This work presents the use of Ar ion milling methods in combination with Ga focused ion beam (FIB) milling as a cutting-edge sample preparation technique from the bulk to specific areas by FIB lift-out without sample-preparation-induced artifacts. The result is an accurately delayered sample from which electron-transparent TEM specimens of less than 15 nm are obtained.

Failure analysis of advanced semiconductor devices demands fast and accurate examination from the bulk to the specific area of the defect. Consequently, nanometer resolution and below is critical for finding defects. This work presents the use of argon ion milling methods for multiple length scale sample preparation, micrometer to sub-ångström, without sample preparation- induced artifacts for correlative SEM and TEM failure analysis. The result is an accurately delayered sample from which electron-transparent TEM specimens of less than 20 nm are obtained.

The size of devices on state-of-the-art integrated circuits continues to decrease with each technology node, which drives the need to continually improve the resolution of electrical failure analysis techniques. Solid immersion lenses are commonly used in combination with infrared light to perform analysis from the backside of the device, but typically only have resolutions down to ~200 nm. Improving resolution beyond this requires the use of shorter wavelengths, which in turn requires a silicon thickness in the 2 to 5 µm range. Current ultra-thinning techniques allow consistent thinning to ~10 µm. Thinning beyond this, however, has proven challenging. In this work, we show how broad beam Ar ion milling can be used to locally thin a device’s backside silicon until the remaining silicon thickness is < 5 µm.

Transmission electron microscopy (TEM) specimens are typically prepared using the focused ion beam (FIB) due to its site specificity, and fast and accurate thinning capabilities. However, TEM and high-resolution TEM (HRTEM) analysis may be limited due to the resulting FIB-induced artifacts. This work identifies FIB artifacts and presents the use of argon ion milling for the removal of FIB-induced damage for reproducible TEM specimen preparation of current and future fin field effect transistor (FinFET) technologies. Subsequently, high-quality and electron-transparent TEM specimens of less than 20 nm are obtained.

The semiconductor industry recently has been investigating new specimen preparation methods that can improve throughput while maintaining quality. The result has been a combination of focused ion beam (FIB) preparation and ex situ lift-out (EXLO) techniques. Unfortunately, the carbon support on the EXLO grid presents problems if the lamella needs to be thinned once it is on the grid. In this paper, we show how low-energy (< 1 keV), narrow-beam (< 1 μm diameter) Ar ion milling can be used to thin specimens and remove gallium from EXLO FIB specimens mounted on various support grids.

The sub-nanometer resolution that transmission electron microscopy (TEM) provides is critical to the development and fabrication of advanced integrated circuits. TEM specimens are usually prepared using the focused ion beam, which can cause gallium-induced artifacts and amorphization. This work presents the use of a concentrated argon ion beam for reproducible TEM specimen preparation using automatic milling termination and targeted ion milling of device features; the result is high-quality and electron-transparent specimens of less than 30 nm. Such work is relevant for semiconductor product development and failure analysis.

Conventional mechanical sample preparation is a difficult and uncontrolled process that does not allow targeting of a specific depth or layer. Because of the difficulties presented by mechanical sample preparation, there has been an emergence of beam-based techniques for device delayering applications. Cross-sectioning is another commonly used technique used in microelectronics industry investigations; when combined with delayering, one can gain complete knowledge about a device's faults. This paper presents a development in semiconductor device investigation using low energy, broad-beam argon ion milling. The results highlight that broad-beam Ar ion milling produces excellent surface quality, which allows high resolution scanning electron microscope observation and energy dispersive spectrometry analyses, even at low energy.