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Proceedings Papers
ISTFA2022, ISTFA 2022: Conference Proceedings from the 48th International Symposium for Testing and Failure Analysis, 176-178, October 30–November 3, 2022,
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The workflow of backside IC circuit edits using low and high ion-beam energy is investigated. The imaging capabilities using a high keV beam are superior to that of lower beam energy, even when using low beam currents, on typical ion beam microscopes. In this work, we will test the parametric shift of IC components following the use of 5 keV Gallium Focused Ion Beam (FIB) to expose Shallow Trench Isolation (STI), depositing a protective dielectric layer, and then switching to 30 keV FIB to perform device alteration. Electrical testing results show that the devices exhibit only a minor parametric shift. We present a case study, performing circuit edit on a 7 nm process node using the proposed workflow. Finally, we discuss the advantages of the proposed workflow.
Proceedings Papers
ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 305-310, November 15–19, 2020,
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In a previous study, the authors introduced a novel technique of using low-beam energy Gallium Focused Ion Beam to expose a large area of Shallow Trench Isolation (STI) over a Dynamic Ring Oscillator (DRO) incurring virtually no change of its operating frequency. In this paper, the authors further investigate the influence of extended dose delivery of 5 kV Ga+ after the initial exposure of the STI over a DRO on modern 7 nm process. The motivation of this study is to understand the dynamics between the Ga+ ion interaction at lower beam energies on live and functional devices and the failure mechanism of the device from such interaction. The frequency of the DROs after the initial STI exposure at 5 kV exhibits <1% increase. Additional dosage of lowkV exposure was performed over the exposed STI and its effects on the DRO frequency was monitored. Finally TEM analysis of the irradiated DROs will be analyzed to understand the failure mechanism of transistors.