In this paper we develop a failure analysis approach based on software weaknesses prediction on the glass interposer packaging. The main objective of this work consists of the reliability improvement of through glass via (TGV) by modeling and simulating the transient thermal cycling load on the glass interposer. Our study consists in a single TGV and the whole package models analysis. Then, we will discuss the benefits and issues of each one. Furthermore, a thermal cycling test and physical analysis in critical areas are done in order to identify the defects failure modes.

Our initial thermal study has provided preliminary results for glass and silicon interposers. Both glass and silicon have their advantages and disadvantages. The glass interposer provides good insulation but lower heat dissipation, while the silicon interposer has better heat dissipation. These results are extremely useful for the reliability of the 3D packaging systems. Concerning the glass interposer fabrication, we have used two laser drilling methods, the first one using Excimer laser and the second using the UV laser. The results obtained are both interesting and provide the required targets both in dimensions and form.

HEMT (High Electron Mobility Transistor) are playing a key role for power and RF low noise applications. They are crucial components for the development of base stations in the telecommunications networks and for civil, defense and space radar applications. As well as the improvement of the MMIC performances, the localization of the defects and the failure analysis of these devices are very challenging. To face these challenges, we have developed a complete approach, without degrading the component, based on front side failure analysis by standard (Visible-NIR) and Infrared (range of wavelength: 3-5 µm) electroluminescence techniques. Its complementarities and efficiency have been demonstrated through two case studies.

HEMT (High Electron Mobility Transistor) are playing a key role for power and RF low noise applications. As well as the improvement of the MMIC performances, the localization of the defects linked with hot electron and the failure analysis of these devices are very challenging. To face these challenges, we have developed a complete approach, without degrading the component, based on front side failure analysis by UV electroluminescence or UV light emission. Its feasibility and efficiency have been demonstrated through two case studies. So, a specific UV microscopy technique has been developed and is presented in this paper.

III-V HBT (Heterojunction Bipolar Transistor) and HEMT (High Electron Mobility Transistor) are playing a key role for power and RF low noise applications. As well as the improvement of the MMIC performances, the localization of the defects and the failure analysis of these devices are very challenging. Active area thickness is only few nanometers, backside failure localization is mandatory because of thermal drain or metal bridge covering the front side, materials involved might be of ultimate hardness and/or high chemical sensitivity while failure mechanisms strongly differ from Si technology ones. To face these challenges, we have developed a complete approach, without degrading the component, based on backside failure analysis by electroluminescence. Its efficiency and completeness have been demonstrated through case studies.