Innovations in semiconductor fabrication processes have driven process shrinks partly to fulfill the need for low power, system-on-chip (SOC) devices. As the process is innovated, it influences the related design debug and failure analysis which have gone through many changes. Historically for signal probing, engineers analyzed signals from metal layers by using e-beam probing methods [1]. But due to the increased number of metal layers and the introduction of flip chip packages, new signal probing systems were developed which used time resolved photon emission (TRE) to measure signals through the backside. However, as the fabrication process technology continues to shrink, the operating voltage drops as well. When the operating voltage drops below 1.0V, signal probing systems using TRE find it harder to detect the signals [2]. Fortunately, Laser Voltage Probing (LVP) technology [3] is capable of probing beyond this limitation of TRE. In this paper, we used an LVP system to analyze and identify a functional shmoo hole failure. We also proposed the design change to prevent its reoccurrence.