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K. Patel
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Proceedings Papers
Valence Band XPS and FT-IR Evaluation of Thermal Degradation of HVAF Thermally Sprayed PEEK Coatings
ITSC 2008, Thermal Spray 2008: Proceedings from the International Thermal Spray Conference, 1069-1071, June 2–4, 2008,
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Coatings of poly(ether-ether-ketone) (PEEK) have been produced using the high-velocity air fuel (HVAF) thermal spray technique. These coatings have been produced at 50 and 100 mm nozzle lengths and 200, 300, and 400 mm gun-to-substrate distances on stainless steel 304 substrates. The techniques used to characterize and determine the extent of thermal degradation of the PEEK coatings were valence-band XPS and FTIR-ATR. Valence-band XPS showed that, in general, minimal degradation of the PEEK occurred during the HVAF thermal spraying process. FTIR-ATR results showed that more surface degradation of the PEEK coating occurred at the 200 mm gun-to-substrate distance for both nozzle lengths than at the larger gun-to-substrate distances. Specifically, absorption bands appeared at 2918 and 2850 cm -1 , which correspond to alkane –CH 2 – asymmetric stretching modes. The resolution of the 672 cm -1 peak, which corresponds to C–H vibrations on the phenyl ring, increased from one to two peaks in the spectra of the 200 and 300 mm gun-to-substrate runs. This indicates a structural change in the phenyl ring, possibly indicating a change in the extent of crystallization of the PEEK polymer.
Proceedings Papers
ISTFA1999, ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis, 335-341, November 14–18, 1999,
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Characterizing and fault localizing sub 0.25μm six level copper BEOL microprocessor RISC designs operating above 450 MHz clock speeds pose significant challenges in functional defect localization and identification. The flip chip designs of these microprocessors with high numbers of I/O outputs can involve backside and frontside fault localization techniques such as emission microscopy, OBIC (Optical Beam Induced Current) using I.R. laser scanning microscopy, LIVA (Light Induced Voltage Alteration) [1,2], and PICA (Picosecond Imaging Circuit Analysis)[3,4], to identify the source of functional failures. Refined backside thinning techniques have been applied to optimize I.R. laser scanning microscopy and PICA localization of functional failures. In addition, products using highly structured test methods such as LSSD(Level Sensitive Scan Design) lend themselves to a highly software diagnosable category [5,6]. Such software diagnostics (LSSD diagnostics) when combined with image based fault localization has proven highly effective in pinpointing defects causing functional failures. Examples of electrical and physical characterization of functional logic failures in the six levels electroplated copper BEOL microprocessors will be described. In addition, the electrical characterization of submicron sized SRAM transistor devices using FIB (Focused Ion Beam Microscopy)deposited probe pads [7] will be detailed along with SEM and TEM micrographs of defects identified in this manner.