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1-4 of 4
Jennifer J Huening
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Proceedings Papers
ISTFA2024, ISTFA 2024: Conference Proceedings from the 50th International Symposium for Testing and Failure Analysis, 519-522, October 28–November 1, 2024,
Abstract
View Papertitled, E-beam Probing and E-beam-Assisted Device Alteration (EADA) for Fault Isolation in PowerVia and Advanced Technology Nodes
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for content titled, E-beam Probing and E-beam-Assisted Device Alteration (EADA) for Fault Isolation in PowerVia and Advanced Technology Nodes
This paper demonstrates that e-beam assisted device alteration (EADA) is a powerful, high-resolution technique for fault isolation debug for advanced technology nodes. A case study using this technique is reviewed and shows successful isolation of a defective single inverter. In addition, fundamental studies of ring oscillator behavior and device perturbations with e-beam exposure found clear correlations for electron beam exposure with NMOS/PMOS device parameters. Electron-hole pair generation in the device with beam exposure is likely the main component for the perturbation, but there may be other contributing factors including charging effects and/or heating.
Proceedings Papers
ISTFA2023, ISTFA 2023: Conference Proceedings from the 49th International Symposium for Testing and Failure Analysis, 164-167, November 12–16, 2023,
Abstract
View Papertitled, Electrical Event Capture with an Electron Beam Probing System
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for content titled, Electrical Event Capture with an Electron Beam Probing System
With the introduction of flip-chip technology, optical-based failure analysis techniques have played a critical role in many failure analysis (FA) laboratories. This is due to the unhindered access for photons to probe or emit from the transistor layer through the bulk silicon. Among the optical techniques, laser voltage imaging (LVI) and laser voltage probing (LVP), collectively called LVx, dominate because they directly expose the electrical activity of a given circuit or cell.
Proceedings Papers
ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 100-102, November 15–19, 2020,
Abstract
View Papertitled, High Spatial and Energy Resolution Fault Isolation by Electron Beam Probing for Advanced Technology Nodes
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for content titled, High Spatial and Energy Resolution Fault Isolation by Electron Beam Probing for Advanced Technology Nodes
On older semiconductor technology, electron-beam probing (EBP) for active voltage contrast and waveform on frontside metal lines was widely utilized. EBP is also being extended to include the well-known optical techniques such as signal mapping imaging (SMI) with the use of a lock-in amplifier in the signal chain and e-beam device perturbation. This paper highlights some of the achievements from an Intel in-house built e-beam tool on current technology nodes. The discussion covers the demonstration of fin and contact resolution on the current technology nodes by EBP and the analysis of the SRAM array with EBP and EBP of metal lines. By utilizing EBP, it has been demonstrated that logic state imaging, SMI, and waveform have significantly improved spatial resolution compared to the current optical fault isolation analogues.
Series: ASM Technical Books
Publisher: ASM International
Published: 01 November 2019
DOI: 10.31399/asm.tb.mfadr7.t91110323
EISBN: 978-1-62708-247-1
Abstract
This article presents methods that enable one to consistently, uniformly and quickly remove substrate silicon from units without imparting damage to the structure of interest. It provides examples of electron beam probing and backside nano-probing techniques. The electron beam probing techniques are E-beam Logic State Imaging, Electron-beam Signal Image Mapping, and E-beam Device Perturbation. Backside nano-probing techniques discussed include: Electron Beam Absorbed Current, Electron Beam Induced Resistance Change, four terminal resistance measurements, resistive gate defect identification, and circuit editing. The article also presents methods to prepare electron beam probing samples where some remaining silicon is required for the transistor functions and transmission electron microscope samples from units where the substrate silicon has been partially or completely removed.
