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I. De Wolf
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Proceedings Papers
ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 446-453, October 31–November 4, 2021,
Abstract
View Papertitled, Fault Isolation Approaches for Nanoscale TSV Interconnects in 3D Heterogenous Integration
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for content titled, Fault Isolation Approaches for Nanoscale TSV Interconnects in 3D Heterogenous Integration
This paper describes optical and electron beam based fault isolation approaches for short and open defects in nanometer-scale through-silicon via (TSV) interconnects. Short defects are localized by photon emission microscopy (PEM) and optical beam-induced current (OBIC) techniques, and open defects are isolated by active voltage contrast imaging in a scanning electron microscope (SEM). The results are confirmed by transmission electron microscopy (TEM) cross-sectioning.
Proceedings Papers
ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 6-11, November 15–19, 2020,
Abstract
View Papertitled, Fault Isolation of Resistive/Open 3-D Wafer Bonding Interconnects by Thermal Laser Stimulation and Light-Induced Capacitance Alteration
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for content titled, Fault Isolation of Resistive/Open 3-D Wafer Bonding Interconnects by Thermal Laser Stimulation and Light-Induced Capacitance Alteration
This paper presents novel optical beam-based defect localization approaches for resistive and open failed wafer-towafer (W2W) bonding interconnects for 3-D integration. The use of an etch back process in combination with thermal laser stimulation (TLS) and light-induced capacitance alteration (LICA) using visible laser excitation enables us to accurately pinpoint defects in high-density W2W interconnect structures down to a pitch of 2.2 µm. We confirm our results by focusedion beam (FIB) cross sectioning.
Proceedings Papers
ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 20-24, November 10–14, 2019,
Abstract
View Papertitled, Localization of Dielectric Breakdown Sites in 3D Through-Silicon Via (TSV) Interconnects by Laser Stimulation and Chip Deprocessing
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for content titled, Localization of Dielectric Breakdown Sites in 3D Through-Silicon Via (TSV) Interconnects by Laser Stimulation and Chip Deprocessing
We report and demonstrate a new methodology for the localization of dielectric breakdown sites in through-silicon via (TSV) structures. We apply a combination of optical beam induced resistance change (OBIRCH) and mechanical/chemical chip deprocessing techniques to localize nm-sized pinhole breakdown sites in a high aspect ratio 3x50 ìm TSV array. Thanks to the wavelength-selective absorption process in silicon, we can extract valuable defect depth localization info from our laser stimulation measurement. After chip deprocessing we inspect and localize the defect site in the dielectric liner using a scanning electron microscope (SEM). We confirm our results and analysis by cross-sectioning a TSV with a focused-ion beam (FIB).
Proceedings Papers
ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 406-413, November 6–10, 2016,
Abstract
View Papertitled, Light-Induced Capacitance Alteration for Nondestructive Fault Isolation in TSV Structures for 3D Integration
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for content titled, Light-Induced Capacitance Alteration for Nondestructive Fault Isolation in TSV Structures for 3D Integration
We report on a new non-destructive electrical fault isolation (EFI) technique to localize interconnection failures in through-silicon via (TSV) structures for three-dimensional (3-D) integration. The scanning optical microscopy (SOM) technique is based on light-induced capacitance alteration (LICA) and uses localized photon probing of TSV interconnect capacitance to localize interruptions of electrical connectivity. The technique is applicable to passivated devices and allows rapid, efficient, and non-destructive fault isolation at wafer level. We describe the physics behind signal generation of the technique and demonstrate the TSV photocapacitance effect. We further demonstrate the LICA technique on open failed TSV daisy chain structures and confirm our results with microprobing and voltage contrast measurements in a scanning electron microscope (SEM).
Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 38-42, November 9–13, 2014,
Abstract
View Papertitled, Failure Analysis Work Flow for Electrical Shorts in Triple Stacked 3D TSV Daisy Chains
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for content titled, Failure Analysis Work Flow for Electrical Shorts in Triple Stacked 3D TSV Daisy Chains
In this paper we show an efficient workflow that combines Magnetic Field Imaging (MFI) and Dual Beam Plasma Focused Ion Beam (DB-PFIB) for fast and efficient Fault Isolation and root cause analysis in 2.5/3D devices. The work proves MFI is the best method for Electric Fault Isolation (EFI) of short failures in 2.5/3D Through Silicon Via (TSV) triple stacked devices in a true non-destructive way by imaging the current path. To confirm the failing locations and to do Physical Failure Analysis (PFA), a DB-PFIB system was used for cross sectioning and volume analysis of the TSV structures and high resolution imaging of the identified defects. With a DB-PFIB, the fault is exposed and analyzed without any sample prep artifacts seen in mechanical polishing or laser preparation techniques and done in a considerably shorter amount of time than that required when using a traditional Gallium Focused Ion Beam (FIB).
Proceedings Papers
ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 11-15, November 15–19, 1998,
Abstract
View Papertitled, Micro-Raman Spectroscopy Evaluation of the Local Mechanical Stress in Shallow Trench Isolation CMOS Structures: Correlation with Defect Generation and Diode Leakage
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for content titled, Micro-Raman Spectroscopy Evaluation of the Local Mechanical Stress in Shallow Trench Isolation CMOS Structures: Correlation with Defect Generation and Diode Leakage
It is shown, using micro-Raman spectroscopy, that Shallow Trench Isolation introduces high stresses in the active area of silicon devices when wet oxidation steps are used. These stresses result in defect formation in the active area, leading to high diode leakage currents. The stress levels are highest near the outer edges of line structures and at square structures. They also increase with decreasing active area dimensions.
Proceedings Papers
ISTFA1997, ISTFA 1997: Conference Proceedings from the 23rd International Symposium for Testing and Failure Analysis, 153-157, October 27–31, 1997,
Abstract
View Papertitled, A Simple, Cost Effective, and Very Sensitive Alternative for Photon Emission Spectroscopy
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for content titled, A Simple, Cost Effective, and Very Sensitive Alternative for Photon Emission Spectroscopy
A new, simple and cost effective photo emission microscope (PEM) for continuous wavelength measurement is proposed (SPEMMI: Spectroscopic Photo Emission Microscope). The new system uses only one sensitive detector (GENIII-NIR) for both conventional failure detection and spectral analysis. The spectrometer and the mechanical parts, used to build up the SPEMMI, are presented. Also the required calibration procedures are discussed. To demonstrate the functionality of the new system, spectra of hot carriers in a saturated NMOS transistor and of a diode in forward and reverse biased conditions are discussed. In addition, the application of SPEMMI for determination of failures that occur in industrial IoDQ-failed VLSI chips is illustrated.