Multiple emission microscopy can be used to obtain a comprehensive overview of device emission during IDDQ-test. In this new approach an emission microscopy image is taken for each pattern of the IDDQ-test. Then the extensive amount of images is analyzed for correlation with IDDQ current levels. As a result, for each increased current level concurrent spots can be identified and further analyzed.

Analog simulation combined with Time Resolved Light Emission (TRE) can be used to evaluate different fault possibilities and to isolate the most likely fault candidate. In this paper we will describe an improved fault model derived from parasitic layout extraction.