This study responds to our need to optimize failure analysis methodologies based on laser/silicon interactions, using the functional response of an integrated circuit to local laser stimulation. Thus it is mandatory to understand the behavior of elementary devices under laser stimulation, in order to model and anticipate the behavior of more complex circuits. This paper characterizes and analyses effects induced by a static photoelectric laser on a 90 nm technology PMOS transistor. Comparisons between currents induced in short or long channel transistors for both ON and OFF states are made. Experimental measurements are correlated to Finite Elements Modeling Technology Computer Aided Design (TCAD) analyses. These physical simulations give a physical insight of carriers generation and charge transport phenomena in the devices.

This paper presents the use of pulsed laser stimulation with picosecond and femtosecond laser pulses. We first discuss the resolution improvement that can be expected when using ultrashort laser pulses. Two case studies are then presented to illustrate the possibilities of the pulsed laser photoelectric stimulation in picosecond single-photon and femtosecond two-photon modes.

Infra-red Thermal Laser Stimulation (TLS) signatures obtained on semiconductor materials can be difficult to interpret and to distinguish from signatures from metallic materials. Investigations presented here consist in the study of TLS signals on unsilicided/silicided polycrystalline and diffused silicon resistors of 0.18µm technology. The influence of each process parameter on the TLS signal has been observed and evaluated from the front and back side of the circuit. This allowed us to quantify the effect of the silicon substrate thickness on TLS signal detection and to determine the ideal silicon thickness for sample preparation. This study also completes our methodology based on the TCR parameter which aims at improving defect localization in the depth (Z) of circuitry. As it will be shown through failure analysis case studies, this methodology increases the physical analysis success rate and reduces the turnaround time.

The continually increasing complexity of integrated circuits has made fault localization progressively more difficult. Despite significant imp rovements in test and diagnosis tools, probing is still required for acquiring new information and for confirming test results. For this reason, we have developed an optimized diagnosis -to-probing flow which significantly reduces the number of nodes to be probed and which dramatically cuts the cost of fault localization. With this approach, probing can be integrated in test and diagnosis operations to reach nodes which are known to be untestable.

Emission microscopy and thermal laser stimulation (OBIRCH, TIVA) are two key methods for backside failure analysis. They are both dedicated for localizing current leakage faults in ICs. The complementary relationship of these two techniques is illustrated through six practical case studies. Thermal laser stimulation was able to precisely and directly localize defects such as shorts in the IC’s metallic elements that where not readily detectable by emission microscopy. The case studies also illustrate the ability of thermal laser stimulation to detect and physically localize defects in the IC’s polysilicon layers and silicon substrate.