3D integration takes more and more importance in the microelectronics industry. This paper focuses on two types or objects, which are copper pillars (25 micrometer of diameter) and hybrid bonding samples. It aims at a statistical morphology observation of hybrid bonding structures, which underwent an electromigration test at 350 deg C and 20 mA. The goal of the study is two-fold. It is both to limit the overall time needed to perform a whole process flow, from sample preparation to reconstructed volume, and to limit the time of human intervention. To achieve this goal, three strategies are presented: improving the sample preparation scheme, reducing the number of projections with iterative algorithms and the Structural SIMilarity function, and automating the post-processing. The post-processing of the data is fully automated and directly renders the reconstructed volume. The high signal to noise ratio allows for further segmentation and analysis.

To get both the resolution and the field of view needed, 3Di devices are characterized in this paper using phase-contrast X-ray tomography performed in a synchrotron source. The paper shows how the synchrotron-based tomography can be routinely used as a tool for failure analysis, and how some strategies can be applied to make those analyses more time-efficient and automatic without any loss of resolution. It presents and assesses the possibilities offered by a synchrotron radiation facility such as European Synchrotron Radiation Facility for the field of failure analysis in microelectronics. The paper illustrates those possibilities through two main examples, based on two different types of connection of bottom and top tiers in 3D integration, either thermocompression with copper pillars or hybrid bonding using copper pads. Several strategies have been successfully tested for the data acquisition to be faster and to limit the needed human intervention as much as possible.

Even though failure analysis performed with a latest generation Phemos 2000 Optical Beam Induced Resistance Change (OBIRCH) tool has given excellent results for 120nm and 90nm technology developments, the limitations of tool and technique become apparent when used for the 65nm technology node and beyond. This article discusses the use of a pulsed laser in combination with a lock-in amplifier for OBIRCH-based fault isolation in latest generation CMOS devices. Using such set-up with appropriate settings for laser pulse frequency, scan speed, and phase shift off-set, a ten-fold signal-to-noise ratio gain is achieved. This improved S/N ratio allows detecting faulty circuitry with higher sensitivity and isolating faults that cannot be detected with the traditional OBIRCH set-up. Various case studies on latest technology devices are presented to illustrate the interest of adding the lock-in capability to the standard OBIRCH tool.

IC manufacturers, among other things, have to define a global failure analysis (FA) strategy that is best adopted to the challenges associated to the introduction of the 90 and 65 nm CMOS technologies. This article reviews the existing FA techniques and then describes an FA strategy that is aiming at fast, efficient, and economic learning in the latest 120-65 nm CMOS technologies. The strategy is based on a well-balanced mix and usage of in-line defectivity data, voltage contrast analyses, SRAM bitmap analysis results, OBIRCH fault isolation, and various advanced physical characterization techniques. A SRAM bitmap strategy has demonstrated to be very effective in driving most relevant process improvements, and also OBIRCH applied to parametric test structures has helped significantly in identifying major yield detractors.

Given the ever increasing complexity of conducting failure analysis on today's latest generation manufacturing processes, the authors have investigated and implemented OBIRCH techniques into process development failure analysis practices. They describe their applications of OBIRCH to 120, 90, and 65 nm samples and their methods for interpreting the results. The OBIRCH technique has the ability to address faults within most structure types and quickly give information on a number of failing sites. It has proven itself as a necessary tool for failure analysis at advanced technology nodes, where fault characterization is getting difficult due to extremely small critical dimensions. The results obtained using the OBIRCH tool have been excellent on 120nm and initial 90nm results. The authors have not yet analyzed enough 65nm samples to form any type of conclusion regarding the tools ability at this technology node.