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F. Beaudoin
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Proceedings Papers
ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 249-252, November 6–10, 2016,
Abstract
View Papertitled, Conductive Thin Film Fail Detection in 20 nm and 14 nm Technologies
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for content titled, Conductive Thin Film Fail Detection in 20 nm and 14 nm Technologies
Conductive thin film residues often referred to as puddles could be challenging fails to detect. A large extant film with no distinct boundaries would make the task more challenging for a comparison between good and bad region. Advanced node 20nm and 14nm technologies mandate use of several conductive thin films in the front end of line processes, and hence a potential for high defects during initial product development stage. Use of other electrical characterization techniques in combination with scanning electron microscopy inspection will be a very powerful tool to detect the root cause affirmatively. Cross-sectional images are necessary to understand the root cause of the fails for corrective actions. This work uses three cases of power supply shorts as a platform to demonstrate the idea, demonstrating a few situations where traditional techniques might reach its limits while the authors depend on additional characterization tools to confidently detect and confirm fails.
Proceedings Papers
ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 121-127, November 6–10, 2005,
Abstract
View Papertitled, Guideline for Interpreting IR Laser Stimulation Signal on Semiconductors for Materials and for Improving Failure Analysis Flow
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for content titled, Guideline for Interpreting IR Laser Stimulation Signal on Semiconductors for Materials and for Improving Failure Analysis Flow
Infra-red Thermal Laser Stimulation (TLS) signatures obtained on semiconductor materials can be difficult to interpret and to distinguish from signatures from metallic materials. Investigations presented here consist in the study of TLS signals on unsilicided/silicided polycrystalline and diffused silicon resistors of 0.18µm technology. The influence of each process parameter on the TLS signal has been observed and evaluated from the front and back side of the circuit. This allowed us to quantify the effect of the silicon substrate thickness on TLS signal detection and to determine the ideal silicon thickness for sample preparation. This study also completes our methodology based on the TCR parameter which aims at improving defect localization in the depth (Z) of circuitry. As it will be shown through failure analysis case studies, this methodology increases the physical analysis success rate and reduces the turnaround time.
Proceedings Papers
ISTFA2004, ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis, 552-557, November 14–18, 2004,
Abstract
View Papertitled, Silicon Thinning using Ultra-Short Pulse Laser Ablation
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for content titled, Silicon Thinning using Ultra-Short Pulse Laser Ablation
Ultra-short pulse laser ablation is applied to IC backside sample preparation. It is contact-less, non-thermal, precise and can ablate the various types of material present in IC packages. This study concerns the optimization of ultra-short pulse laser ablation for silicon thinning. Uncontrolled silicon roughness and poor uniformity of the laser thinned cavity needed to be tackled. Special care is taken to minimize the silicon RMS roughness to less than 1µm. Application to sample preparation of 256Mbit devices is presented.
Proceedings Papers
ISTFA2003, ISTFA 2003: Conference Proceedings from the 29th International Symposium for Testing and Failure Analysis, 440-445, November 2–6, 2003,
Abstract
View Papertitled, Magnetic Emission Mapping for Passive Integrated Components Characterisation
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for content titled, Magnetic Emission Mapping for Passive Integrated Components Characterisation
We developed a system and a method to characterize the magnetic field induced by circuit board and electronic component, especially integrated inductor, with magnetic sensors. The different magnetic sensors are presented and several applications using this method are discussed. Particularly, in several semiconductor applications (e.g. Mobile phone), active dies are integrated with passive components. To minimize magnetic disturbance, arbitrary margin distances are used. We present a system to characterize precisely the magnetic emission to insure that the margin is sufficient and to reduce the size of the printed circuit board.
Proceedings Papers
ISTFA2001, ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis, 151-159, November 11–15, 2001,
Abstract
View Papertitled, Implementing Thermal Laser Stimulation in a Failure Analysis Laboratory
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for content titled, Implementing Thermal Laser Stimulation in a Failure Analysis Laboratory
Several considerations related to the implementation of the thermal laser stimulation method (OBIRCH, TIVA) in a failure analysis laboratory will be discussed. At the CNES (French Space Agency), we implemented this method on a dual system which includes an emission microscope and a laser-scanning microscope. The amplifier used for amplifying the weak voltage or current variations caused by thermal laser stimulation was shown to be a key factor. The design of such a low noise, high gain and fast voltage amplifier is described. From a 3D finite element ANSYS model of the thermal laser stimulation effect combined with three practical case studies we show that thermal laser stimulation is a rapid and precise method for localizing metallic short type faults in ICs. In order to interpret the thermal laser stimulation signal, a simple CMOS inverter model is also presented.
Proceedings Papers
ISTFA2001, ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis, 227-235, November 11–15, 2001,
Abstract
View Papertitled, Emission Microscopy and Thermal Laser Stimulation for Backside Failure Localization
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for content titled, Emission Microscopy and Thermal Laser Stimulation for Backside Failure Localization
Emission microscopy and thermal laser stimulation (OBIRCH, TIVA) are two key methods for backside failure analysis. They are both dedicated for localizing current leakage faults in ICs. The complementary relationship of these two techniques is illustrated through six practical case studies. Thermal laser stimulation was able to precisely and directly localize defects such as shorts in the IC’s metallic elements that where not readily detectable by emission microscopy. The case studies also illustrate the ability of thermal laser stimulation to detect and physically localize defects in the IC’s polysilicon layers and silicon substrate.
Proceedings Papers
ISTFA2001, ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis, 469-475, November 11–15, 2001,
Abstract
View Papertitled, Smart Testing Interface: New Inexpensive Tool for Defect Localization in ICs
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for content titled, Smart Testing Interface: New Inexpensive Tool for Defect Localization in ICs
To deal with failure analysis laboratory tasks, we have developed a modular and smart test system. We demonstrate that Smart Testing Interface can keep a device in the proper electrical state for defect localization. It is a key part of our system and can be easily adapted on a wide range of electrical testers. It offers a unique combination of a slave and a standalone mode. In slave mode, it has a non-disruptive interface between the tester and the component. In stand-alone mode, it is an electrical stimuli generator that can keep the device under test in the correct internal electrical state during IC defect localization. A battery or a power supply powers it up. It can be readily carried in stand-alone mode from one tool to another tool. In stand-alone mode, it has a range of eight hours or more according to the battery capacity and device consumption. We will review a failure analysis laboratory needs and then describe test solutions with our Modular and Smart Test System and a 344 I/O Smart Testing Interface. It is used for EMMI and OBIRCH applications on PHEMOS 1000.
Proceedings Papers
ISTFA2000, ISTFA 2000: Conference Proceedings from the 26th International Symposium for Testing and Failure Analysis, 553-558, November 12–16, 2000,
Abstract
View Papertitled, New Laser Ablation Method for Non-Destructive Backside Sample Preparation
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for content titled, New Laser Ablation Method for Non-Destructive Backside Sample Preparation
A new ultra-short pulse laser ablation based backside sample preparation method has been developed. This technique is contact-less, non-thermal, precise, repetitive and adapted to each type of material present in IC packages. Backside preparation examples are presented on a conventional DIL plastic package, on a TSOP plastic package with an oversized silicon die, on a DIL ceramic package and on a CCD device. Feasibility of silicon thinning using laser ablation is also discussed.