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Eric Cattey
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Proceedings Papers
ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 48-52, November 10–14, 2019,
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Failure analysis on mixed-signal ICs for automotive applications often requires the use of EVBs (evaluation boards) to replicate the failure mode. Typically, automotive ICs are used in conjunction with other components to create automotive modules, such as; PCM (power-train control modules), ECU (engine control units), TCU (transmission control units), etc. EVBs are used to replicate module level functionality, as well as reproduce ATE (automatic test equipment) tests required for analysis. An integral part of EVB design, functionality and performance is related to the IC socket, which is the direct interface between the IC and the EVB. See Figure 1. EVB socket solutions will vary based on the required analysis (backside / topside analysis), package type and IC functionality.
Proceedings Papers
ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 507-512, November 1–5, 2015,
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FA cannot consist of simply jumping to conclusions. The FA process is validated through correlation with the initial failure and through interpretation of the obtained results, subjective by definition. This paper illustrates the difficulty of analyzing complex failures caused by multiple factors, including wafer fabrication, assembly, and application conditions. Inter-Layer Dielectric (ILD) delamination was experienced on various ICs from the same 250nm technology. A complete set of techniques (C-SAM, laser and optical microscopy, SEM, FIB cross-sections, TEM, EFTEM, SIMS, Auger, delineation) was used as different pieces of the same puzzle to reveal the multiple factors contributing to the ILD delamination failures. Due to the subtle nature of some of the underlying causes, defining an accurate FA approach with appropriate sample preparation and accurate device traceability was critical to understanding this complex, multivariate issue.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 86-90, November 3–7, 2013,
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The proverbial needle in the haystack – locating a minute process defect or subtle ESD strike in a large sea of analog output power FETs can be just that. The premise of this paper is to discuss failure analysis techniques used to identify these elusive “needles”, specifically in large array power FET structures. Two case studies will be explored in detail – both of which are 250nm technology devices.