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1-20 of 25
Edward I. Cole
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Proceedings Papers
ISTFA2024, ISTFA 2024: Tutorial Presentations from the 50th International Symposium for Testing and Failure Analysis, r1-r60, October 28–November 1, 2024,
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Presentation slides for the ISTFA 2024 Tutorial session “Flip Chip and Backside Techniques (2024 Update).”
Proceedings Papers
ISTFA2024, ISTFA 2024: Conference Proceedings from the 50th International Symposium for Testing and Failure Analysis, 501-508, October 28–November 1, 2024,
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The rise of 2.5D and 3D heterogeneous integrated devices presents unique challenges for failure analysis, as traditional 2D analysis techniques prove inadequate due to chip stacking, layer interconnects, die obscuration, and limited access to test points. While various non-destructive techniques—including 3D X-ray imaging, lock-in thermography, magnetic field imaging, and optical beam methods—offer partial solutions, each has specific limitations. We present a novel defect localization approach using radio frequency electromagnetic (EM) emanations, implemented in two ways: detecting EM signals emitted by the device under controlled input conditions, or measuring induced voltage responses to signals injected via a scanning antenna. The technique employs scanning magnetic or electric field antennas to generate 2D or 3D electromagnetic maps revealing current and electric continuity patterns, enabling detection of shorts (additional current paths) or opens (blocked current paths). By incorporating power spectrum analysis (PSA) at each scan point, our method—designated as EM antenna PSA (EMAPSA) or EM injection PSA (EMIPSA)—provides comprehensive defect detection capabilities for 3D heterogeneous integration failure analysis.
Proceedings Papers
ISTFA2023, ISTFA 2023: Tutorial Presentations from the 49th International Symposium for Testing and Failure Analysis, d1-d58, November 12–16, 2023,
Abstract
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Presentation slides for the ISTFA 2023 Tutorial session “Flip-Chip and Backside Techniques (2023 Update).”
Proceedings Papers
ISTFA2022, ISTFA 2022: Tutorial Presentations from the 48th International Symposium for Testing and Failure Analysis, g1-g58, October 30–November 3, 2022,
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This presentation covers the basic physics needed to understand and to effectively apply backside IC analysis techniques to flip-chip packaged die. It describes the principles of light transmission through silicon and the factors that influence optical image formation from the backside of the wafer or die. It also provides information on the tools and techniques used to expose surfaces, regions, and features of interest for analysis. It describes the steps involved in CNC milling, mechanical grinding and polishing, reactive ion etching (RIE), laser microchemical (LMC) etching, and milling and etching by focused ion beam (FIB). It explains where and how each technique is used and quantifies the capabilities of different combinations of methods.
Proceedings Papers
ISTFA2021, ISTFA 2021: Tutorial Presentations from the 47th International Symposium for Testing and Failure Analysis, g1-g58, October 31–November 4, 2021,
Abstract
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This presentation covers the basic physics needed to effectively apply backside IC analysis techniques to flip-chip packaged die. It describes the principles of light transmission through silicon and the factors that influence optical image formation from the backside of the wafer or die. It also provides information on the tools and techniques used to expose surfaces, regions, and features of interest for analysis. It describes the steps involved in CNC milling, mechanical grinding and polishing, reactive ion etching (RIE), laser microchemical (LMC) etching, and milling and etching by focused ion beam (FIB). It explains where and how each technique is used and quantifies the capabilities of different combinations of methods.
Proceedings Papers
Paiboon Tangyunyong, Edward I. Cole, Jr., Guillermo M. Loubriel, Joshua Beutler, Darlene M. Udoni ...
ISTFA2017, ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis, 73-78, November 5–9, 2017,
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We present a new, non-destructive electrical technique, Power Spectrum Analysis (PSA). PSA as described here uses off-normal biasing, an unconventional way of powering microelectronics devices. PSA with off-normal biasing can be used to detect subtle differences between microelectronic devices. These differences, in many cases, cannot be detected by conventional electrical testing. In this paper, we highlight PSA applications related to aging and counterfeit detection.
Proceedings Papers
ISTFA2017, ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis, 164-170, November 5–9, 2017,
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Manufacturing of integrated circuits (ICs) using a split foundry process expands design space in IC fabrication by employing unique capabilities of multiple foundries and provides added security for IC designers [1]. Defect localization and root cause analysis is critical to failure identification and implementation of corrective actions. In addition to split-foundry fabrication, the device addressed in this publication is comprised of 8 metal layers, aluminum test pads, and tungsten thru-silicon vias (TSVs) making the circuit area > 68% metal. This manuscript addresses the failure analysis efforts involved in root cause analysis, failure analysis findings, and the corrective actions implemented to eliminate these failure mechanisms from occurring in future product.
Proceedings Papers
ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 6-13, November 1–5, 2015,
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Visible light laser voltage probing (LVP) for backside improved optical spatial resolution is demonstrated on ultrathinned bulk Si samples. A prototype system for data acquisition, a method to produce ultra-thinned bulk samples as well as LVP signal, imaging, and waveform acquisition are described on bulk Si devices. Spatial resolution and signal comparison with conventional, infrared LVP analysis is discussed.
Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 110-114, November 9–13, 2014,
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Visible light laser voltage probing (LVP) for improved backside optical spatial resolution is demonstrated on ultra-thinned samples. A prototype system for data acquisition, a method to produce ultrathinned SOI samples, and LVP signal, imaging, and waveform acquisition are described on early and advanced SOI technology nodes. Spatial resolution and signal comparison with conventional, infrared LVP analysis is discussed.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 369-375, November 3–7, 2013,
Abstract
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Microsystems-enabled photovoltaics (MEPVs) are microfabricated arrays of thin and efficient solar cells. The scaling effects enabled by this technique results in great potential to meet increasing demands for light-weight photovoltaic solutions with high power density. This paper covers failure analysis techniques used to support the development of MEPVs with a focus on the laser beam-based methods of LIVA, TIVA, OBIC, and SEI. Each FA technique is useful in different situations, and the examples in this paper show the relative advantages of each method for the failure analysis of MEPVs.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 392-397, November 3–7, 2013,
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This paper presents two different case studies that highlight the use of reflected light imaging in laser scanning microscopy. In the first case study, the exact location of defects in metal comb test structures were much easier to detect with reflected light imaging than with thermally-induced voltage alteration (TIVA). This case study also shows visible-wavelength TIVA defect localization using a 532-nm laser. A comparison between 532-nm TIVA and conventional 1320-nm TIVA is made to show the resolution improvement with the visible laser. In the second case study, the cause of a linear string of bit failures was localized easily with backside reflected light imaging. It is observed that the indicated sites matched the light-induced voltage alteration signals and the failing cells in the bit map. In both of the case studies, the reflected light images have proved very helpful in the localization and characterization of failing devices or test structures.
Journal Articles
Journal: EDFA Technical Articles
EDFA Technical Articles (2010) 12 (3): 4–8.
Published: 01 August 2010
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One of the pioneering developers of induced voltage alteration (IVA) measurement techniques assesses the current state of the technology, the impact of major advancements, and the potential for further improvements. The assessment pays particular attention to biasing approaches, phase-locked loop detection techniques, the effect of solid immersion lenses on spatial resolution, and the emergence of production-type sample preparation methods.
Journal Articles
Understanding the Effects of Local Structures on TIVA Profiles Using Thermal Modeling and Simulation
Journal: EDFA Technical Articles
EDFA Technical Articles (2010) 12 (3): 10–18.
Published: 01 August 2010
Abstract
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Thermally-induced voltage alteration (TIVA) is a laser-based method for localizing interconnect defects in ICs. Its main limitation is that the laser must heat the defect and change its resistance sufficiently to produce a measurable voltage alteration. Anything that interferes with laser absorption or alters defect heating makes TIVA less effective. This article presents the results of a study on the effects of local structures on TIVA imaging. The authors selected a polysilicon-metal test structure as the focal point of their study, which entailed experimental investigation along with modeling and simulation. It was found that the TIVA profiles on this structure are strongly influenced by local geometry, particularly the variation of interlevel silicon dioxide thickness and the placement of polysilicon lines with respect to aluminum lines. Understanding such relationships is essential for locating defects using TIVA techniques.
Proceedings Papers
ISTFA2006, ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis, 321-327, November 12–16, 2006,
Abstract
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Light emission [1,2] and passive voltage contrast (PVC) [3,4] are common failure analysis tools that can quickly identify and localize gate oxide short sites. In the past, PVC was not used on electrically floating substrates or SOI (silicon-on-insulator) devices due to the conductive path needed to “bleed off” charge. In PVC, the SEM’s primary beam induces different equilibrium potentials on floating versus grounded (0 V) conductors, thus generating different secondary electron emission intensities for fault localization. Recently we obtained PVC signals on bulk silicon floating substrates and SOI devices. In this paper, we present details on identifying and validating gate shorts utilizing this Floating Substrate PVC (FSPVC) method.
Journal Articles
Edward I. Cole, Jr., Paiboon Tangyunyong, Charles F. Hawkins, Michael R. Bruce, Victoria J. Bruce ...
Journal: EDFA Technical Articles
EDFA Technical Articles (2002) 4 (4): 11–16.
Published: 01 November 2002
Abstract
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Resistive interconnections, a type of soft failure, are extremely difficult to find using existing backside methods, and with flip-chip packages, alternative front side approaches are of little or no help. In an effort to address this challenge, a team of engineers developed a new method that uses the effects of resistive heating to directly locate defective vias, contacts, and conductors from either side of the die. In this article, they discuss the basic principles of their new method and demonstrate its use on two ICs in which a variety of resistive interconnection failures were found.
Proceedings Papers
ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 21-27, November 3–7, 2002,
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We have developed a new scanning laser microscopy methodology, Soft Defect Localization (SDL), that directly locates soft defects from the front side and backside of an IC. The method combines localized laser heating with the pass/fail state of a device to successfully localize soft defects. Subtle, thermally sensitive soft defects can be localized by careful selection of the IC voltage, temperature, and operating frequency. Several examples are shown.
Proceedings Papers
Jeremy A. Walraven, Edward I. Cole, Jr., Danelle M. Tanner, Seethambal S. Mani, Ernest J. Garcia ...
ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 283-290, November 3–7, 2002,
Abstract
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Surface micromachined micromirror technologies are being employed for various commercial and government applications. One application of micromirror technologies in the commercial sector can be found in Digital Light Projection (DLP™) systems used for theater and home entertainment centers. DLP™ systems developed by Texas Instruments uses DMD™ technology (Digital Mirror Device), an array of micromirrors, to project light onto a screen [1]. This technology is also used by Infocus™ projection systems and widescreen tabletop televisions [2]. Here, the micromirrors act as individual pixels, reflecting light onto the screen with high ¡§digital¡¨ resolution. The most recent application of surface micromachined micromirror technology is optical switching [3], which uses micromirrors to switch optical signals from fiber to fiber for lightwave telecommunications [4]. Companies such as Lucent have fabricated entire optical micromirror switching systems based on their Microstar™ technology [5]. For government applications, surface micromachined micromirror arrays have been developed for potential use in a spectrometer system planned for NASA's Next Generation Space Telescope (NGST) [6]. Various processing technologies are used to fabricate surface micromachined micromirrors. The micromirror arrays developed by TI and Lucent [1,4] uses metal for their structural and reflective components. Micromirrors fabricated at Sandia National Laboratories use the SUMMiT™ (Sandia's Ultra-planar MEMS Multi-level Technology) process with metal deposited on the surface of mechanical polysilicon components to reflect light. Optical micromirror arrays designed and fabricated at Sandia for potential use in the NGST have undergone reliability testing and failure analysis. This paper will discuss the failure modes found in these micromirrors after reliability testing. Suggestions and corrective actions for improvements in device performance will also be discussed.
Journal Articles
Journal: EDFA Technical Articles
EDFA Technical Articles (2002) 4 (3): 11–14.
Published: 01 August 2002
Abstract
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This article presents the results of a study conducted at Sandia National Labs to assess the effect of electrostatic discharge on surface micromachined MEMS devices. This failure mode has largely been overlooked because ESD failure mechanisms often mimic the effects of stiction-adhesion. To measure the susceptibility of MEMS devices to ESD, Sandia engineers built and tested a silicon microengine and a torsional ratcheting microactuator. Test results indicate that the effects of ESD are highly dependent on device design, component stiffness, and geometry and that slight modifications can bring improvements.
Journal Articles
Journal: EDFA Technical Articles
EDFA Technical Articles (2002) 4 (2): 10–16.
Published: 01 May 2002
Abstract
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This article provides a qualitative overview of several new defect localization techniques, including charge-induced voltage alteration (CIVA), light-induced voltage alteration (LIVA), thermally-induced voltage alteration (TIVA), and Seebeck effect imaging (SEI). It explains how each method works in terms of the physics of signal generation and the types of images they produce. It also includes a summary highlighting the similarities and differences of each technique.
Proceedings Papers
Edward I. Cole, Jr., Paiboon Tangyunyong, Charles F. Hawkins, Michael R. Bruce, Victoria J. Bruce ...
ISTFA2001, ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis, 43-50, November 11–15, 2001,
Abstract
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Resistive Interconnection Localization (RIL) is a new scanning laser microscope analysis technique that directly and rapidly localizes defective IC vias, contacts, and conductors from the front side and backside. RIL uses a scanned laser to produce localized thermal gradients in IC interconnections during functional testing. A change in the pass/fail state with localized heating of the IC identifies the failing site. The technique reduces the time to locate a resistive via from months to minutes. The sources of defective vias, the physics of RIL signal generation, and examples of RIL analysis are presented.
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