The U.S. CHIPS and Science Act includes $52 billion in subsidies for domestic semiconductor research and manufacturing. This guest editorial describes the program's scope and potential impact on the microelectronics industry.

This article assesses the progress that has been made in the development and implementation of through-silicon via (TSV) technology, the work yet to be done, and the challenges associated with potential failure mechanisms.

This column provides an update on the latest developments in 3D IC technology and outlines the work that still remains before the promises of full 3D integration can be realized.

The pace of development for 2.5-D packaging solutions appears to be accelerating as the timeline for the adoption of 3D through-silicon via (TSV) technology continues to slide. This column discusses the latest advancements in 2.5-D or interposer packaging technology and the growing number of applications.

This column explains that silicon interposers, considered an interim solution to full 3D integration, may turn out to be more than a stepping stone along the path toward 3D ICs.

This article provides a brief introduction to through-silicon via technology, a system-level architecture in which multiple layers of planar devices are stacked with interconnects running in the vertical as well as lateral direction. Some of the different fabrication processes in use are discussed along with related challenges.