The authors use electron spectroscopy for chemical analysis and Auger electron analysis to study the interaction of Cl and F with Al thin-films deposited as thin-films on Si wafers and as Al bondpads. The motivation behind the study is F contamination being the putative source of poor throughput at wafer probe. F species stemming from NH4F and XeF2 exposure behave quite differently from HF on the Al surface. Whereas HF tends to attack the Al metal and leave an extended oxygenated-fluorinated surface, NH4F and XeF2 promote the formation of a stable, non-deliquescent fluoride salt of aluminum. HCl is far less corrosive to Al than HF, leaving a thin chlorinated-oxygenated surface. Immersion of Al thin-films in tetra-methyl-ammonium hydroxide (TMAH) and NH4OH provided non-halogenated surfaces for comparison. With exposure to air, the surface coated with the fluorinated Al salt (NH4F) adsorbs oxygen from the air to form a segregated AlF3/Al2O3 bilayer that remains stable with a total thickness on the order of 5 nm to 10 nm. Furthermore, wafers treated with NH4F display stellar throughput performance at wafer test despite having surface F contamination. A mechanical rather than chemical model is proposed to explain the improved performance at wafer probe with the immersion of wafers in a bath containing fluoride salts before wafer probe.

The authors present a detailed analysis of a full-thickness backside trenching and contact level circuit editing methodology used to achieve a success yield of greater than 90%. The methodology involves both full-thickness backside trenching and contact level circuit modifications on flip-chip parts produced with 90nm, 65nm, and 40nm foundry processes and mounted on laminated package technology. Having successfully edited >150 parts with this methodology, the authors prove that full-thickness trenching is a viable alternative to a traditional die-thinning process, and that circuit edits at the contact layer, to avoid milling into the copper metal layers, greatly reduces risk and uncertainty.

We present an analysis of tungsten vias fabricated by a focused ion beam with regard to the understanding of circuit editing strategies. The growth rate of W is ~10 times faster in high aspect ratio vias than on flat surfaces, and W in vias has 4 at. % more C but only one-tenth the Ga of surface-deposited W. We propose that vias act like small Faraday cups, trapping the energy of the Ga+ ions and the reaction byproducts to enhance the growth rate of W and to increase the C to W ratio in vias compared to flat surfaces. The resistivity of W in the vias determined by a least squares fit to resistance data is 250μΩ-cm, unchanged from the resistivity of W deposited on a flat surface. The resistances of the vias fabricated in a SiO2 layer to contact an underlying Al sheet layer fit well to either of two models: 1) an effective area model that invokes resistive via sidewalls that do not participate in conduction, and 2) an contact resistance model that invokes tapered vias with a constricted W/Al contact area.