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David H. Su
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Journal Articles
Wafer-Level Failure Analysis Process Flow
Available to Purchase
Journal: EDFA Technical Articles
EDFA Technical Articles (2010) 12 (2): 4–11.
Published: 01 May 2010
Abstract
View articletitled, Wafer-Level Failure Analysis Process Flow
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Wafer-level failure analysis plays an important role in IC fabrication, both in process development and yield enhancement. This article outlines the general flow for wafer-level FA and explains how it differs for memory and logic products. It describes the tools and procedures used for failure mode verification, electrical analysis, fault localization, sample preparation, chemical analysis, and physical failure analysis. It also discusses the importance of implementing corrective actions and tracking the results.
Proceedings Papers
Effect of Ash Chemistries on TDDB Lifetime of Cu/ULK Interconnects
Available to Purchase
ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 413-415, November 6–10, 2005,
Abstract
View Papertitled, Effect of Ash Chemistries on TDDB Lifetime of Cu/ULK Interconnects
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for content titled, Effect of Ash Chemistries on TDDB Lifetime of Cu/ULK Interconnects
The effect of ash chemistries, N2/H2 and H2, on time-dependent dielectric breakdown (TDDB) lifetime has been investigated for Cu damascene structure with a carbon-doped CVD ultra low-k (ULK, k=2.5) intermetal dielectric. Two failure modes, interfacial Cu-ion-migration and Cu diffusion through the bulk intermetal ULK were attributed to the TDDB degradation for the H2 ash.The interfacial Cu-ion-migration was the only dominated failure mode for the N2/H2 ash. The nitrogen species in the N2/H2 plasma proved to be capable of forming a nitrided protection layer on the surface of the ULK. This nitrided layer suppressed further plasma damage during the ash process and thus lessened the TDDB degradation by preventing Cu diffusion through the bulk ULK.