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1-2 of 2
Christopher G.L. Ferri
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Proceedings Papers
ISTFA2022, ISTFA 2022: Conference Proceedings from the 48th International Symposium for Testing and Failure Analysis, 170-175, October 30–November 3, 2022,
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Reproducible laser-assisted metal deposition with copper hexafluoroacetylacetonate trimethylvinylsilane Cu(hfac) (TMVS) has been demonstrated on a range of relevant semiconductor insulating material surfaces including silicon dioxide (SiO 2 ), crystalline silicon (c-Si), and organic package material such as polyimide and printed circuit board (PCB) FR- 4. A key to reliable and chemically efficient growth is a novel copper chemistry delivery methodology using direct precursor pulsing. The laser power conditions for deposition are strongly correlated to the substrate material, with increased power for the more thermally conductive samples (0.8 – 1.0 W) and significantly less for packaging materials (50 mW). The laser-assisted copper growth results and material properties are comparable to the published literature. Examples of circuit modifications using this methodology demonstrate its valuable role in the future of circuit edit.
Proceedings Papers
ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 357-361, November 15–19, 2020,
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The journey to the circuit layer will be described by first discussing baseline processes of laser assisted chemical etching (LACE) steps before the focused ion beam (FIB) workflow. These LACE processes take advantage of a dual 532 nm continuous wave (CW) and pulse laser system, however limitations and overhead that is transferred over to the FIB operator will be demonstrated. Experiments show an additional third 355 nm ultraviolet (UV) pulse laser process introduction into the workflow can further reduce the remaining silicon thickness (RST) relieving FIB overhead. In addition, complex pulse laser patterning techniques will show a refinement to nonuniform produced silicon. Finally, other pulse laser patterning techniques such as polygon etch capability will allow laser etching around and in-between features to enhance circuit layer accessibility for debug operations.