Non-destructive inspection and analysis techniques are crucial for quality assessment and defect analysis in various industries. They enable for screening and monitoring of parts and products without alteration or impact, facilitating the exploration of material interactions and defect formation. With increasing complexity in microelectronic technologies, high reliability, robustness and thus, successful failure analysis is essential. Machine learning (ML) approaches have been developed and evaluated for the analysis of acoustic echo signals and time-resolved thermal responses for assessing their ability for defect detection. In the present paper different ML architectures were evaluated, including 1D and 2D convolutional neural networks (CNNs) after transforming time-domain data into the spectra-land wavelet domains. Results showed that 2D CNN with wavelet domain representation performed best, however at the expense of additional computational effort. Furthermore, ML-based analysis was explored for lock-in thermography to detect and locate defects in the axial dimension based on thermal emissions. While promising, further research is needed to fully realize its potential.

Localizing security-relevant hard blocks on modern System-on-Chips (SoCs) for physical attacks, such as sidechannel analysis and fault attacks, has become increasingly time-consuming due to ever-increasing chip-area and - complexity. While this development increases the effort and reverse engineering cost, it is not sufficient to withstand resolute attackers. This paper explores the application of camera-based lock-in thermography (LIT), a nondestructive testing method, for identifying and localizing security hard blocks on integrated circuits. We use a synchronous signal to periodically activate security-related functions in the firmware, which causes periodic temperature changes in the activated die areas that we detect and localize via an infra-red camera. Using this method, we demonstrate the precise detection and localization of security-related hard blocks at the die level on a modern SoC.

Lock-In Thermography is an established nondestructive method for analyzing failures in microelectronic devices. In recent years, a major improvement made it possible to acquire time-resolved temperature responses of weak thermal spots, greatly enhancing defect localization in 3D stacked architectures. One limitation, however, is in the method used to determine defect depth, which is based on the numerical estimation of the delay between excitation and thermal response inferred from the value of the lock-in phase. In structures where the region between the origin of the defect and sample surface is partially or fully transparent to infrared signals, interference between radiated and conducted signal components largely falsifies the phase value on which the classical depth estimation relies. In the present study, blind source separation based on independent component analysis was successfully used to separate interfering signal components arising from direct thermal radiation and conduction, resulting in a precise estimation of the defect depth.

Lock-in thermography (LIT) has been successfully applied in different excitation and analysis modes including classical LIT, analysis of the time-resolved temperature response (TRTR) upon square wave excitation and TRTR analysis in combination with arbitrary waveform stimulation. The results obtained by both classical square wave- and arbitrary waveform stimulation showed excellent agreement. Phase and amplitudes values extracted by classical LIT analysis and by Fourier analysis of the time resolved temperature response also coincided, as expected from the underlying system theory. In addition to a conceptual test vehicle represented by a point-shaped thermal source, two semiconductor packages with actual defects were studied and the obtained results are presented herein. The benefit of multi-parametric imaging for identification of a defect’s lateral position in the presence of multiple hot spots was also demonstrated. For axial localization, the phase shift values have been extracted as a function of frequency [4]. For comparative validation, LIT analyses were conducted in both square wave and arbitrary waveform excitation using custom designed and sample-specific stimulation signals. In both cases result verification was performed employing X-ray, scanning electron microscopy (SEM) and energy dispersive x-ray (EDX) as complementary techniques.

Tremendous research efforts have been devoted particularly to the development and improvement of through silicon vias (TSV) in order to provide a key enabling technology for vertical system integration. To achieve high processing yield and reliability efficient failure analysis techniques for process control and root cause analysis are required. The current paper presents an advanced approach for non-destructive localization of TSV sidewall defects applying high resolution Lock-in Thermography and Photoemission Microscopy imaging and defocusing series.

In this paper we will demonstrate new approaches for failure analysis of memory devices with multiple stacked dies and TSV interconnects. Therefore, TSV specific failure modes are studied on daisy chain test samples. Two analysis flows for defect localization implementing Electron Beam Induced Current (EBAC) imaging and Lock-in-Thermography (LIT) as well as adapted Focused Ion Beam (FIB) preparation and defect characterization by electron microscopy will be discussed. The most challenging failure mode is an electrical short at the TSV sidewall isolation with sub-micrometer dimensions. It is shown that the leakage path to a certain TSV within the stack can firstly be located by applying LIT to a metallographic cross section and secondly pinpointing by FIB/SEM cross-sectioning. In order to evaluate the potential of non-destructive determination of the lateral defect position, as well as the defect depth from only one LIT measurement, 2D thermal simulations of TSV stacks with artificial leakages are performed calculating the phase shift values per die level.

Lock-in Thermography in combination with spectral phase shift analysis provides a capability for non-destructive 3D localization of resistive defects in packaged and multi stacked die devices. In this paper a novel post processing approach will be presented allowing a significant reduction of measurement time by factor >5 in comparison to the standard measurement routine. The feasibility of the approach is demonstrated on a specific test specimen made from ideal homogenous and opaque material and furthermore on a packaged hall sensor device. Within the case studies the results of multiple single LIT measurements were compared with the new multi harmonics data analysis approach.

In this paper a novel approach for precise localisation of thin oxide breakdowns in transistor or capacitor structures by electron beam absorbed current (EBAC) imaging based on Scanning Electron Microscopy will be presented. The technique significantly improves sensitivity and lateral resolution of short localisation in comparison to standard techniques, e.g. Photoemission Microscopy, and provides direct defect navigation within a combined FIB/SEM system for further cross section analysis. The oxide short is minimal affected by electrical stimulation preserving its original defect structure for further physical root cause analysis. The feasibility of this new technique is demonstrated on a gate oxide (GOX) and two capacitor oxide (COX) breakdown failures.

In this paper the application of solid immersion lenses (SIL) in combination with Lock-in Thermography will be demonstrated for backside defect localization. The paper will give an introduction into Lock-in Thermography technique and presents a new developed easy-to-use holding system to adapt SIL for high resolution thermal imaging. It will be shown that defect localization can be applied from the backside of the chip up to a silicon thickness of 250µm using the same SIL. The relationship between the bulk silicon thickness and the resulting optical parameters was investigated.