Competitive circuit analysis of an Integrated Circuit (IC) is one of the most challenging types of analysis. It involves various high technology steps of IC die de-processing/de-layering; keeping precise planarity from metal layer to metal layer, Scanning Electron Microscope (SEM) imaging and images mosaicking, image recognition and Graphic Database System (GDS) segmentation processes and finally logic and architecture level analysis. One of the most complicated analysis is Power Management and Power Distribution [2] on the entire IC die when no datasheet or other IC’s information is available. Power Distribution analysis requires the highest level of architecture analysis, not feasible by conventional Reverse Engineering (RE) methods or extremely costly. The current paper discusses and demonstrates a new inventive methodology of Power Distribution analysis using known FIB Passive Voltage Contrast (PVC) effects [1]. This patented technique provides significant time and resources saving.

Competitive circuit analysis of Integrated Circuits (ICs) is one of the most challenging types of analysis. It involves multiple complex IC die de-processing/de-layering steps while keeping precise planarity from metal layer to metal layer. Each step is followed by Scanning Electron Microscope (SEM) imaging together with mosaicking that subsequently passes through an image recognition and Graphic Database System (GDS) conversion process. This conventional procedure is quite time and resource consuming. The current paper discusses and demonstrates a new inventive methodology of circuit tracing on an IC using known FIB Passive Voltage Contrast (PVC) effects [1]. This technique provides significant savings in time and resources.