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Proceedings Papers
ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 132-136, November 6–10, 2016,
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As semiconductor technology keeps scaling down, failure analysis and device characterizations become more and more challenging. Global fault isolation without detailed circuit information comprises the majority of foundry EFA cases. Certain suspected areas can be isolated, but further narrow-down of transistor and device performance is very important with regards to process monitoring and failure analysis. A nanoprobing methodology is widely applied in advanced failure analysis, especially during device level electrical characterization. It is useful to verify device performance and to prove the problematic structure electrically, especially for implantation related problems [1] [2]. Implantation related defects, or invisible defects, are the most challenging defect types for the application of fault isolation in all of the failure analysis jobs. The key challenge for these kinds of analyses is to make the defect visible. Sometimes, it is difficult or even impossible to visualize the defective point. Then, sufficient electrical evidence and theory analysis are important to bring the issue to resolution. For these kinds of analyses, a nanoprobing system is a necessary tool to conduct the detailed analysis. Combined with the device physics and electrical theory analysis, nanoprobing can bring out the perfect failure mechanism and problematic process step. There are two popular nanoprobing systems in our lab, one is SEM based and the other is AFM based. Both systems have their advantages and disadvantages in the electrical characterization and fault isolation field. In this paper, an implantation related issue was analyzed. Gross leakage was observed on the failed units as compared with good units. Global fault isolation, TIVA and EMMI failed to find the exclusive hotspot. With the GDS and process analysis, the nanoprobing was employed to the performance check on some of the suspected structures. Finally, the defective location was successfully isolated by nanoprobing. Combined with device physics and electrical analysis, the problematic process was successfully isolated.
Proceedings Papers
ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 520-526, November 6–10, 2016,
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In this paper, the effects of an open defect resulting in floating gate on combinational logic gate structures are studied. From this study, a novel method is derived to predict and narrow down the potential open defect location from a long failure path that is driving multiple branches of input nodes, into a much smaller segment without EBAC analysis. This method is applied with great success to localize open defects on actual low yield cases from advanced technology nodes with significant reduction in FA cycle time.
Proceedings Papers
ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 414-417, November 1–5, 2015,
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This paper explains how the authors used nanoprobing techniques and electrical characterization to trace a die failure to a problem with the photoresist used to mask the wafer for ion implantation. Nanoprobing and leakage current measurements revealed significant differences between the inner and outer fingers of a multi-finger native transistor. Based on simulations, the differences can be attributed to severe scattering at the active edge of the Pwell due to problems with the photoresist, resulting in nonuniform doping profiles and die failure.
Proceedings Papers
ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 503-506, November 1–5, 2015,
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This paper describes the debug and analysis process of a challenging case study from wafer foundry which involved a circular patch functional leakage failure that was induced from device parametric drift due to thicker gate oxide with no detection signal from inline monitoring vehicles. It highlights the need for failure analyst to always be inquisitive and to deep dive into the failure symptoms to value-add the fab in discovering the root cause of the failure in challenging situation where information is limited.
Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 1-4, November 9–13, 2014,
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This paper describes the effectiveness of using light induced Current Imaging – Atomic Force Microscopy (CIAFP) to localize defects that are not easily detected through conventional CI-AFP. Defect localization enhancement for both memory and logic failures has been demonstrated. For advanced technology nodes memory failures, current imaging from photovoltaic effects enhanced the detection of bridging between similar types of junctions. Light induced effects also helped to improve the distinction between gated and nongated diode, as a result enhanced localization of gate to source/drain short.
Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 307-311, November 9–13, 2014,
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Dynamic Laser Stimulation (DLS) technique have met with great success over the past few years in helping failure analysis engineer to tackle different type of soft failures. DLS is widely applied to devices presenting an abnormal behavior for any electrical parameter, such as operating voltage and frequency. This paper showcase another successful implementation of DLS technique, combined with design analysis to reveal the root cause for SRAM soft failure.
Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 318-321, November 9–13, 2014,
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The case study in this paper describes how collaboration between customer design and test teams and a thorough FAB investigation triggered by a detailed electrical analysis using the Atomic Force Nanoprober (AFP) resulted in the effective resolution of a challenging implant related issue on LDMOS structure that caused yield loss. The quick success in this case has led to a shorter yield ramp cycle on this new product for mass production.
Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 345-349, November 9–13, 2014,
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This paper describes the observation of photoemissions from saturated transistors along a connecting path with open defect in the logic array. By exploiting this characteristic phenomenon to distinguish open related issues, we described with 2 case studies using Photon Emission Microscopy, CAD navigation and layout tracing to identify the ‘open’ failure path. Further layout and EBAC analysis are then employed to effectively localize the failure site.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 260-263, November 3–7, 2013,
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This paper describes 2 case studies where device characterizations using Atomic Force Probe (AFP) nanoprobing, allow for the localization and verification of design weakness and process variations on the Analog-to-Digital (ADC) block that resulted in degraded device performance and severe yield loss. In these cases, the sensitive resistor structures in the ADC block was impacted due to design pattern density interaction with process fabrication steps. In addition, close collaboration with customer was also essential for quick root cause identification, design and process fix.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 424-426, November 3–7, 2013,
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It is difficult to simulate functional failures using static analysis tools, therefore, debugging and troubleshooting devices with functional failures present a special challenge for failure analysis (FA) work and often result in a root-cause success rate is quite low. In this paper, the application of advanced FIB circuit edit (CE) processes combined the static FA analysis yielded successful localization of a bipolar junction transistor (BJT) device soft failure. Additional FA techniques were incorporated within the FA flow, resulting in characterization of the electrical behavior of a suspected transistor and detection of an abnormal implant profile within the active area.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 549-552, November 3–7, 2013,
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This paper describes a sample preparation methodology for Trench Power MOSFET that significantly improved our failure analysis success rate for trench bottom defect. With precise fault localization and subsequent a unique physical failure analysis using parallel polishing method on Trench Power MOSFET, This enabled defect detection from the trench top to the trench bottom.
Proceedings Papers
ISTFA2011, ISTFA 2011: Conference Proceedings from the 37th International Symposium for Testing and Failure Analysis, 349-353, November 13–17, 2011,
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This paper describes a low yield case which results in a unique 68 mm single ring wafer sort failure pattern. A systematic problem solving approach with the application various FA techniques and detailed Fab investigation resolved the issue. The root cause for the unique ring failure pattern was due to a burr at the implanter load lock. The burr scratched and toppled the photoresist resulting in subsequent blocked well implantation and memory failure.
Journal Articles
Journal: EDFA Technical Articles
EDFA Technical Articles (2010) 12 (3): 20–27.
Published: 01 August 2010
Abstract
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The best spatial resolution that can be achieved with far-field optical fault localization techniques is around 20 times larger than the critical defect size at the 45 nm technology node. There is also a limit on the laser power that can be safely used on 45 nm devices, which further compromises fault localization precision. In this article, the authors explain how they overcome these limitations using pulsed laser-induced imaging techniques and a refractive solid immersion lens. Two case studies show how the combination of pulsed-laser scanning optical microscopy and a solid immersion lens improves localization precision and detection sensitivity.
Proceedings Papers
ISTFA2008, ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis, 1-6, November 2–6, 2008,
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The effect of Refractive Solid Immersion Lens (RSIL) parameters on the enhancement to laser induced fault localization techniques are investigated. The experimental results of the effect on a common laser induced technique, namely Thermally Induced Voltage Alteration (TIVA), and imaging are presented. A signal enhancement in the peak TIVA signal of close to 12 times has been achieved.
Proceedings Papers
ISTFA2008, ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis, 402-406, November 2–6, 2008,
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The spatial resolution and sensitivity of laser induced techniques are significantly enhanced by combining refractive solid immersion lens technology and laser pulsing with lock-in detection algorithm. Laser pulsing and lock-in detection enhances the detection sensitivity and removes the ‘tail’ artifacts due to amplifier ac-coupling response. Three case studies on microprocessor devices with different failure modes are presented to show that the enhancements made a difference between successful and unsuccessful defect localization.
Proceedings Papers
ISTFA2007, ISTFA 2007: Conference Proceedings from the 33rd International Symposium for Testing and Failure Analysis, 156-160, November 4–8, 2007,
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In this paper, the application of pulsed-TIVA for the localization of Cu/low- k interconnect reliability defects in comb test structures is described. Two types of subtle dielectric defects which are otherwise not detectable with conventional TIVA can be detected with pulsed-TIVA.
Proceedings Papers
ISTFA2006, ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis, 234-238, November 12–16, 2006,
Abstract
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This paper describes a pulsed laser induced digital signal integration algorithm for pulsed laser operation that is compatible with existing ac-coupled and dc-coupled detection systems for fault localization. This algorithm enhances laser induced detection sensitivity without a lock-in amplifier. The best detection sensitivity is achieved at a pulsing frequency range between 500 Hz to 1.5 kHz. Within this frequency range, the algorithm is capable of achieving more than 9 times enhancement in detection sensitivity.
Proceedings Papers
ISTFA2004, ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis, 604-608, November 14–18, 2004,
Abstract
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This article describes a series of experiments that were conducted on flash memory devices to correlate the defects that are detected by photon emission microscopy (PEM) and laser-induced techniques. Currently, there are two main categories of fault localization techniques for failure analysis, namely passive and active techniques. The article discusses defect localization by PEM and SOM. Three types of defects are described: Type 1 defects are those that can be accurately localized by both PEM and laser-induced techniques; Type 2 defects are defects which can only be detected with PEM and are not observable with laser-induced techniques; and Type 3 defects are those that are detectable with laser-induced techniques but cannot be detected by PEM. While PEM is able to capture the symptoms of existing leakage defects, laser-induced techniques can precisely localize temperature sensitive defects.