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A.B. Cawthorne
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Proceedings Papers
ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 33-37, November 9–13, 2014,
Abstract
View Papertitled, 3D IC/Stacked Device Fault Isolation Using 3D Magnetic Field Imaging
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for content titled, 3D IC/Stacked Device Fault Isolation Using 3D Magnetic Field Imaging
The need to increase transistor packing density beyond Moore's Law and the need for expanding functionality, realestate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques and require novel non-destructive, true 3D Failure Localization techniques. We describe in this paper innovations in Magnetic Field Imaging for FI that allow current 3D mapping and extraction of geometrical information about current location for non-destructive fault isolation at every chip level in a 3D stack.
Proceedings Papers
ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 189-193, November 3–7, 2013,
Abstract
View Papertitled, 3D Magnetic Field Imaging for Non-Destructive Fault Isolation
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for content titled, 3D Magnetic Field Imaging for Non-Destructive Fault Isolation
While transistor gate lengths may continue to shrink for some time, the semiconductor industry faces increasing difficulties to satisfy Moore’s Law. One solution to satisfying Moore’s Law in the future is to stack transistors in a 3-dimensional (3D) formation. In addition, the need for expanding functionality, real-estate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques. We describe in this paper innovations in Magnetic Field Imaging for FI which have the potential to allow 3D characterization of currents for non-destructive fault isolation at every chip level in a 3D stack.
Proceedings Papers
ISTFA2003, ISTFA 2003: Conference Proceedings from the 29th International Symposium for Testing and Failure Analysis, 6-8, November 2–6, 2003,
Abstract
View Papertitled, High Resolution Current Imaging by Direct Magnetic Field Sensing
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for content titled, High Resolution Current Imaging by Direct Magnetic Field Sensing
Two types of magnetic microscopes have been investigated for use in high resolution current mapping. The scanning fiber/SQUID microscope uses a SQUID sensor coupled to a nanoscale ferromagnetic probe, and the GMR microscope employs a nanoscale giant magnetoresistive sensor. Initial scans demonstrate that these microscopes can resolve current lines less than 10 µm apart with edge resolution of 1 µm. These types of microscopes are compared with the performance of a standard scanning SQUID microscope and with each other with respect to spatial resolution and magnetic sensitivity. Both microscopes show great promise for identifying current defects in die level devices.