Abstract Presentation slides from the ISTFA 2021 tutorial, “[STEM-in-SEM: From Basic Imaging to Rigorous Quantitative Analysis].”

Abstract This paper provides an overview of the semiconductor analysis process at BMW. It explains how it was developed and how it differs from the failure analysis process used in semiconductor fabs. It describes the general process flow from first analyses through descending levels of localization at different length scales. It discusses sample preparation procedures, test methods and equipment, and advanced techniques. In the work presented here, the authors explain how they combined ToF-SIMS with STEM lamella preparation in a FIB-SEM, which allowed them to correlate concentration variances in an underlying layer with surface anomalies discovered during light microscope inspection.

Abstract This paper evaluates the use of nanomilling and STEM imaging to analyze failure mechanisms in sub-50 nm InP HEMTS. The devices were life tested at elevated temperatures and biases and their electrical characteristics were measured at each stress interval. Devices that were damaged were investigated further to assess the underlying failure mechanism. Advanced microscopy with sub-nm resolution was employed to examine the physical characteristics of the failed HEMT devices at the atomic scale. As the paper explains, the examination was conducted using a focused ion beam/scanning electron microscope (FIB/SEM), an Ar gas ion nanomill, and STEM imaging.

Abstract In this work, we investigate mushroom type phase-change material (PCM) memory cells based on Ge 2 Sb 2 Te 5 . We use low-angle annular dark field (LAADF) STEM imaging and energy dispersive X-ray spectroscopy (EDX) to study changes in microstructure and elemental distributions in the PCM cells before and after SET and RESET conditions. We describe the microscope settings required to reveal the amorphous dome in the RESET state and present an application example involving the failure analysis of a PCM test array made with devices fabricated at IBM’s Albany AI Hardware Research Center.

Abstract An advanced technique for site-specific Atom Probe Tomography (APT) is presented. An APT sample is prepared from a targeted semiconductor device (commercially available product based on 14nm finFET technology). Using orthogonal views of the sample in STEM while FIB milling, a viable APT sample is created with the tip of the sample positioned over the lightly-doped drain (LDD) region of a pre-defined PFET. The resulting APT sample has optimal geometry and minimal amorphization damage.

Abstract The composition of InGaN/AlN/GaN MQWs nano structure is anlayzed by STEM/EDS. The concentration of nitrogen in GaN materials is usually lower than that of gallium for specimen thickness larger than 50 nm due to low penetration ability of N K X-rays (0.392 KeV). The concentration of indium in the InGaN quanturm wells obtained by STEM/EDS analysis is always much lower its real value. This concentration dilution in this 3 nm structure results from the effect of electron beam broadening, and can be improved to a certain level by reducing specimen thickness, C2 aperture, and dwell time, with a sacrifice in signal intensity.

Abstract Low energy (i.e., 5 keV, 3 keV) Xe+ plasma FIB methods were applied to Si ex situ lift out specimens. Cs-corrected STEM imaging reveals the Si dumbbell structure indicating excellent surface quality achieved during the low energy polishing steps.

Abstract Vacuum assisted ex situ lift out may be used for fast, easy, and reproducible plan view specimen preparation. Manipulation of samples via beveled hollow glass probes whose plane of interest is parallel to slotted grids allow for conventional FIB milling for S/TEM analysis.

Abstract In transmission electron microscopy (TEM), one typically considers bright-field or dark-field imaging signals, which utilize the transmitted and scattered electrons, respectively. Analytical signals such as characteristic X-Rays or primary electron beam energy losses from inelastic scattering events give rise to the energy dispersive X-Ray spectroscopy and electron energy loss spectroscopy techniques, respectively. In this paper, the detection of the electron beam absorbed current (EBAC) and electron beam induced current (EBIC) signals is reported using a specially designed scanning TEM holder and associated amplification electronics. By utilizing thin TEM samples where the beam-sample interaction volume is controlled more through the incident electron probe size, the EBAC and EBIC signal resolution is improved to the point where implant regions and Schottky junction depletion zones can be visualized.

Abstract Novel techniques to expose substrate-level defects are presented in this paper. New techniques such as inter-layer dielectric (ILD) thinning, high keV imaging, and XeF2 poly etch overflow are introduced. We describe these techniques as applied to two different defects types at FEOL. In the first case, by using ILD thinning and high keV imaging, coupled with focused ion beam (FIB) cross section and scanning transmission electron microscopy (STEM,) we were able to judge where to sample for TEM from a top down perspective while simultaneously providing the top down images giving both perspectives on the same sample. In the second case we show retention of the poly Si short after removal of CoSi2 formation on poly. Removal of the CoSi2 exposes the poly Si such that we can utilize XeF2 to remove poly without damaging gate oxide to reveal pinhole defects in the gate oxide. Overall, using these techniques have led to 1) increased chances of successfully finding the defects, 2) better characterization of the defects by having a planar view perspective and 3) reduced time in localizing defects compared to performing cross section alone.

Abstract Shrinking transistor geometries present ongoing challenges for backside FIB circuit edit operations. The available space to gain access to critical signal lines has diminished to the order of hundreds of nanometers. Several previous works have shown that the diffusion of active devices can be exposed. This paper explores the effects of exposing and selectively damaging the active diffusion layer of advanced finFET process technology. STEM cross section images show that the devices are unaffected when the silicon substrate is on the order of 1-2ums. When the silicon substrate is removed to less than 100nm, the effect can be seen electrically on a set of ring oscillators.

Abstract With semiconductor geometries approaching sub 10 nanometer gate levels in the not too distant future and with higher levels of integration, new ways of characterizing defects and examining the 3D distribution visually and elementally on the nanometer level are required to keep up with the demands of the modern FA lab. The purpose of this study is to demonstrate the workflow and show the results of an automated 3D STEM-EDX data acquisition & visualization system that can be utilized for the failure analysis of semiconductor devices.

Abstract A failure analysis work flow is presented demonstrating dislocation visualization, site isolation, TEM lamella preparation and defect characterization. A novel beam control technique allows visualizing dislocations with significantly improved spatial resolution in SEM using Electron Channeling Contrast Imaging. Site-specific TEM preparation on dislocations is therefore possible. The prepared thin lamella can be inspected in the SEM using STEM to study dislocations. This is a cost effective work flow without using TEM.

Abstract Multiple techniques including electrical resistance measurement plus calculation, cross-sectional view of passive voltage contrast (XPVC) sequential searching, planar and cross-section STEM are successfully used to isolate a nanoscale defect, single metallic stringer in a snakecomb test structure. The defect could not be found by traditional failure analysis methods or procedures. The unique approach presented here, expands failure analysis capabilities to the detection of nanometer-scale defects and the identification of their root causes. With continuous shrinking feature sizes, the need of such techniques becomes more vital to failure analysis and root cause identification, and therefore yield enhancement in fabrication.

Abstract In this paper, we discuss a set of techniques and analysis methodologies for the reverse engineering and functionality extraction of complex mixed-signal ICs with a special focus for security applications. Front and back side reflected light pattern images at different magnifications are used to identify circuit blocks. Time-integrated and time-resolved photon emission data is used to identify gate logic states, sequences of events, and specific functional activity. Backscattered electron and scanning transmission electron images mosaics are used to reverse engineer individual gates and observe local interconnects. Thermal imaging is used to aid in the functional block identification and analog gates analysis. Different advanced methodologies for tool automation, focusing, mapping, and image processing are also discussed in the context of our proposed electro-optical tester based technique.

Abstract The modern scanning transmission electron microscope (S/TEM) has become a key technology and is heavily utilized in advanced failure analysis (FA) labs. It is well equipped to analyze semiconductor device failures, even for the latest process technology nodes (20nm or less). However, the typical sample preparation process flow utilizes a dual beam focused ion beam (FIB) microscope for sample preparation, with the final sample end-pointing monitored using the scanning electron microscope (SEM) column. At the latest technology nodes, defect sizes can be on the order of the resolution limit for the SEM column. Passive voltage contrast (PVC) is an established FA technique for integrated circuit (IC) FA which can compensate for this resolution deficiency in some cases. In this paper, PVC is applied to end-pointing cross-sectional S/TEM samples on the structure or defect of interest to address the SEM resolution limitation.

Abstract In this study, a comprehensive investigation of the Ag-Al bond degradation mechanism in an electrically failed module using the argon ion milling, scanning electron microscopy (SEM), dual beam focused ion beam-SEM, scanning transmission electron microscopy energy dispersive x-ray spectroscopy, and time-of-flight secondary ion mass spectrometry is reported. It is found that the bond degradation is due to the galvanic corrosion in the Ag-Al bonding area. Specific attention is given to the information of microstructures, elements, and corrosive ions in the degraded bond. In this study, it is believed that the Ag-Al bond degradation is highly related to the packaging designs.

Abstract This paper outlines the systematic isolation of an electrostatic discharge defect on a depletion-mode FET. Topics covered are fault isolation, FIB-STEM cross-section and EDS analysis, and defect simulation. Multiple GaAs PA devices were submitted for analysis after failing different reliability stresses. Fault isolation revealed ESD damage on a DFET connected to the VMODE0 pin. Simulation of the failure showed that, most likely, the defect was caused by CDM stress. A design change of inserting a resistor between the VMODE0 pin and the DFET made the device more robust against CDM stress.

Abstract In the context of the increasing complexity of materials used in semiconductor device processes, the STEM EDX technique is now used routinely. It can be used to discriminate stacked layers in advanced devices where STEM HAADF Z-contrast is not sufficient. Moreover, it allows a new use of planar preparation for layer investigation. The complexity of analyzed structures drives a need for 3D information which can also be obtained with the chemical information of the EDX analysis.

Abstract Transmission Electron Microscopy (TEM) and scanning TEM (STEM) is widely used to acquire ultra high resolution images in different research areas. For some applications, a single TEM/STEM image does not provide enough information for analysis. One example in VLSI circuit failure analysis is the tracking of long interconnection. The capability of creating a large map of high resolution images may enable significant progress in some tasks. However, stitching TEM/STEM images in semiconductor applications is difficult and existing tools are unable to provide usable stitching results for analysis. In this paper, a novel fully automated method for stitching TEM/STEM image mosaics is proposed. The proposed method allows one to reach a global optimal configuration of each image tile so that both missing and false-positive correspondences can be tolerated. The experiment results presented in this paper show that the proposed method is robust and performs well in very challenging situations.