This presentation provides an overview of nanoprobe systems and what they reveal about defects and abnormalities in semiconductor device structures and materials. The presentation covers the basic operating principles, implementation, and capabilities of atomic force probe and beam-based imaging techniques, including AFP pico-current contrast and scanning capacitance imaging, SEM/FIB active voltage contrast imaging, and SEM/FIB electron-beam absorbed current (EBAC), induced current (EBIC), and induced resistance change (EBIRCH) imaging. It also includes guidelines for probing transistors and copper metallization and case studies in which nanoprobing was used to analyze gate oxide and substrate defects, intermittent bit cell failures, threshold voltage shifts, and time-domain popcorn noise.

This presentation covers the theory and practice of scanning transmission electron microscopy in a scanning electron microscope or STEM-in-SEM. It provides a detailed overview of the measurement physics, the equipment required, the importance of collection angle control, and contrast interpretation. It explains how and why different detectors are used and how they are calibrated. It addresses the issue of beam damage and explains how to quantify and deal with it. It also covers advanced concepts, including 4D STEM-in-SEM, nanoscale strain and temperature mapping, and the use of programmable STEM detectors for imaging and diffraction, and provides examples demonstrating the capabilities of the various measurement setups.

This presentation addresses topics of relevance to scanning electron microscopy, including SEM basics, electron guns, electron optics, beam-specimen interactions, signal detection, sample prep and cleanliness, low-voltage imaging, nonconductive imaging, voltage contrast, stage biasing, electron channeling contrast imaging, magnetic contrast imaging, STEM-in-SEM, 3D imaging and analytics, image post-processing, and automation.

The paper presents the approach of enhancing time-domain signal analysis using machine learning techniques for analyzing acoustic echo signals and the subsequent derivation of condition-related class assignments for failure analysis. The examples provided here include two types of flip-chips with defects intentionally induced by thermal stressing. Besides investigating the general applicability and the benefit of the approach the current study also investigated the applicability of different deep learning model-architectures and compared their performances, accuracies, and robustness with respect to external impacts such as noise, jitter or physical defocusing. For independent verification selected defects which have either been identified by an experienced operator or the ML algorithm or both, have been further analyzed and validated by FIB/SEM cross sectional analysis.

In this work we present a new approach in physical failure analysis. Fault isolation can be done using volume diagnosis techniques. But when studying the identified defect sites by Focused Ion Beam (FIB) cross-sectioning, correct interpretation of the cross-sectional views strongly relies on choosing an appropriate cutting strategy. However, volume diagnosis techniques do not provide any information on which cutting directions and settings to choose to avoid misinterpretation of the spatial evolution of the defects. The proposed approach is to acquire FIB-SEM tomographic datasets at the defect sites to unequivocally characterize the defects in three-dimensional visualizations, independent of particular cross-sectioning strategies. In this specific case we have applied the methodology at a microcontroller for automotive applications on which a couple of floating VIAS were found. Thanks to the complete information obtained with the tomography, the defect could be assigned to a specific class of etching tools, and the root cause thus be solved.

Automated TEM lamella preparation using the remote CAD to SEM image alignment has been demonstrated for high volume failure analysis. The proposed method not only provides a secure means of using CAD design data during the lamella prep process, but offers an improved flexibility compared to conventional methods of processing CAD design file in a tool environment. The experiment showed that the new method is 3.1 times higher in throughput and requires 74 times less manhours, compared to manual process.

In prior work, it was demonstrated that information about device turn-on can be obtained in a nanoprobing setup which involves no applied bias across the channel. This was performed on nFET logic devices in 7 nm technology and attributed to the Seebeck effect, or heating from the SEM beam. In this work, the experiments are continued to both nFET and pFET devices and on both 22 nm and 5 nm devices. Further discussion about the opportunities and evidence for Seebeck effect in nanoprobing are discussed.

Delayering is an essential sample preparation step in physical failure analysis (PFA) of integrated circuits (IC). During delayering it is crucial to precisely control the endpoint and uniformity of the region of interest (ROI). Furthermore, to perform SEM based nanoprobing it is also required to end the delayering process without residues on the surface that will reduce conductivity of, or induce shorts between, isolated contacts. Delayering via mechanical polishing has been the main approach for PFA and nanoprobing. However, as the shrinkage of the interconnect layer thickness reduced below 100 nm, it has become very challenging to control the polish endpoint and to achieve robustly controlled process. Recently gas assisted Xe+ Plasma FIB (PFIB) has demonstrated uniform delayering of the metal and dielectric layers, achieving a planar surface of heterogeneous materials. The purpose of this study is to analyze the PFIB ion beam interaction with MOSFET devices, addressing ion beam damage related device degradation. We explored the final surface treatment required for nanoprobing and the impact on MOSFETs. For this purpose, we monitored device parameters after PFIB delayering final steps with different beam conditions and compare PFIB prepared samples to polished prepared samples. Consequently, we summarize the considerations of parameters for ion beam on final surface treatment.

Microscopic imaging and characterization of semiconductor devices and material properties often begin with a sample preparation step. A variety of sample preparation methods such as mechanical lapping and broad ion beam (BIB) milling have been widely used in physical failure analysis (FPA) workflows, allowing internal defects to be analyzed with high-resolution scanning electron microscopy (SEM). However, these traditional methods become less effective for more complicated semiconductor devices, because the cross-sectioning accuracy and reliability do not satisfy the need to inspect nanometer scale structures. Recent trends on multi-chip stacking and heterogenous integration exacerbate the ineffectiveness. Additionally, the surface prepared by these methods are not sufficient for high-resolution imaging, often resulting in distorted sample information. In this work, we report a novel correlative workflow to improve the cross-sectioning accuracy and generate distortion-free surface for SEM analysis. Several semiconductor samples were imaged with 3D X-ray microscopy (XRM) in a non-destructive manner, yielding volumetric data for users to visualize and navigate at submicron accuracy in three dimensions. With the XRM data to serve as 3D maps of true package structures, the possibility to miss or destroy the fault regions is largely eliminated in PFA workflows. In addition to the correlative workflow, we will also demonstrate a proprietary micromachining process which is capable of preparing deformation-free surfaces for SEM analysis.

This paper evaluates the use of nanomilling and STEM imaging to analyze failure mechanisms in sub-50 nm InP HEMTS. The devices were life tested at elevated temperatures and biases and their electrical characteristics were measured at each stress interval. Devices that were damaged were investigated further to assess the underlying failure mechanism. Advanced microscopy with sub-nm resolution was employed to examine the physical characteristics of the failed HEMT devices at the atomic scale. As the paper explains, the examination was conducted using a focused ion beam/scanning electron microscope (FIB/SEM), an Ar gas ion nanomill, and STEM imaging.

IC camouflaging has been proposed as a promising countermeasure against reverse engineering. Camouflaged gates contain multiple functional device structures, but appear as a single layout under microscope imaging, thereby concealing circuit functionality. The recent covert gate camouflaging design comes with a significantly reduced overhead cost, allowing numerous camouflaged gates in circuits which improves resiliency against invasive and semi-invasive attacks. Dummy inputs are used in the design, but SEM imaging analysis has only been performed on simplified contact structures so far. In this study, we fabricated real and dummy contacts in different structures and performed a systematic SEM analysis to investigate contact charging and passive voltage contrast. Machine learning based pattern recognition was also employed to examine the possibility of differentiating real and dummy contacts. Based on our experimental results, we found that the difference between real and dummy contacts is insignificant, which effectively prevents SEM-based reverse engineering.

An experimental study was undertaken to determine the minimum level of leakage or shorting current that could be detected by electron-beam induced resistance change (EBIRCH) analysis. A 22-nm SRAM array was overstressed with a series of gradually increasing voltage biases followed by EBIRCH scans at 1 V and 2-kV SEM imaging until fins were observed. It was found that the fins of a pulldown device could be imaged by EBIRCH at just 12 nA of shorting current, representative of a soft failure. Stressing the sample at higher voltages eventually created an ohmic short, which upon further investigation, strongly suggested that the Seebeck effect plays a significant role in EBIRCH analysis.

This paper describes a procedure for preparing packaged GaN devices for photon emission microscopy from the backside, which has proven to be an effective method for isolating faults. The deprocessing technique was developed for GaN devices formed on thick p ++ silicon substrates mounted in quad-flat no-lead (QFN) packages connected by gold wires. It consists of mechanical polishing, which removes backside metal and packaging material, and selective etching, which quickly etches the silicon while leaving the gold wires intact for electrical measurements. The authors describe each step of the process in detail and explain how emission spots are marked with a UV laser and analyzed in a FIB-SEM system to determine the underlying cause of failure.

This paper presents a large-volume workflow for fast failure analysis of microelectronic devices. The workflow incorporates a stand-alone ps-laser ablation tool and a FIB-SEM system. As implemented, the picosecond laser is used to quickly remove large volumes of bulk material while the Xe plasma FIB provides precise end-pointing to the feature of interest and fine surface polishing after laser ablation. The paper presents several application examples, including a full workflow to prepare artefact-free, delamination-free cross-sections in an AMOLED mobile display and the preparation of devices and packages (including flip chips) of varying size. It also covers related issues such as CAD navigation, data correlation, and the use of bitmap overlays for end-pointing.

With manufacturers now capable of creating transistors in the 5-7 nm node range, the ability to isolate, inspect, and probe individual metal and via layers is of the utmost importance for defect inspection and design validation. These isolated layers can be inspected for defects via SEM, provide design validation, or tested with electrical probing for failure analysis. The work herein describes a functional workflow that enables manufacturers to perform this kind of sample preparation in an automated fashion using plasma focused ion beam (FIB) technology. The workflow is scalable and can be used in both lab and fabrication environments.

This paper presents a method for determining positional variation and offsets in high aspect ratio etches used in the production of 3D NAND devices. The method uses a 3D fiducial as a positional reference in the field-of-view, which not only allows for high precision tracking of features through the depth of the device, but also aids in the alignment of images when performing 3D reconstructions. The workflow is based on plasma dual beam diagonal milling, which allows users to characterize structures through the device stack at a much higher throughput/slice than conventional methods, enabling enhanced process monitoring and control.

This paper describes how electron beam induced current (EBIC) analysis is used to determine the doping profile of p-n junctions and identify defective devices. The limitations of both chemical etching and EBIC are discussed as is the use of ion milling as a potential method for enhancing resolution. The findings in this paper add to the understanding of EBIC and provide insights to further improvements in its use in failure analysis.

This paper presents a method that allows top view SEM inspection on GaN devices previously subjected to PEM analysis from the backside and the associated sample preparation procedures. By filling the backside cavity with glob-top resin and epoxying the device to a piece of silicon, it is possible to remove all covering layers with a sequence of wet etches. A dried Ag liquid strap eliminates SEM charging problems and backside laser marks are made visible from the front side using an IR wavelength. The paper describes each step of the process in detail along with the results of the frontside SEM inspection.

This presentation provides an overview of nanoprobe systems and what they reveal about defects and abnormalities in semiconductor device structures and materials. The presentation covers the basic operating principles, implementation, and capabilities of atomic force probe and beam-based imaging techniques, including AFP pico-current contrast and scanning capacitance imaging, SEM/FIB active voltage contrast imaging, and SEM/FIB electron-beam absorbed current (EBAC), induced current (EBIC), and induced resistance change (EBIRCH) imaging. It also includes guidelines for probing transistors and copper metallization and case studies in which nanoprobing was used to analyze gate oxide and substrate defects, intermittent bit cell failures, threshold voltage shifts, and time-domain popcorn noise.

This presentation addresses topics of relevance to scanning electron microscopy, including SEM basics, electron guns, electron optics, beam-specimen interactions, signal detection, sample prep and cleanliness, low-voltage imaging, nonconductive imaging, voltage contrast, stage biasing, electron channeling contrast imaging, magnetic contrast imaging, STEM-in-SEM, 3D imaging and analytics, and image post-processing.