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Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 163-171, October 31–November 4, 2021,
...Abstract Abstract Modern reverse engineering (RE) workflows involve a growing number of challenges as process nodes drop below 5 nm. As more circuitry is packed into smaller areas, larger quantities of raw data must be collected and processed to help reconstruct the underlying schematics...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 172-178, October 31–November 4, 2021,
... (EDA) tool which combines the small features of micro electro-mechanical systems (MEMS), simulation of X-ray, and 3D PCB Manufacturing to iteratively optimize PCB design to thwart reverse engineering and probing attacks. Index Terms Additive Manufacturing, MEMS, Hardware Assurance, Physical Inspection...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 179-189, October 31–November 4, 2021,
...Abstract Abstract IC camouflaging has been proposed as a promising countermeasure against reverse engineering. Camouflaged gates contain multiple functional device structures, but appear as a single layout under microscope imaging, thereby concealing circuit functionality. The recent covert...
Proceedings Papers

ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 172-179, November 15–19, 2020,
... inspection; PCB reverse engineering; PCB competitor analysis; hardware assurance; bill of materials bill of materials color normalization failure analysis hardware assurance hardware Trojans linear discriminant analysis printed circuit boards visual inspection Color Normalization for Robust...
Proceedings Papers

ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 180-187, November 15–19, 2020,
...Abstract Abstract In the hardware assurance community, Reverse Engineering (RE) is considered a key tool and asset in ensuring the security and reliability of Integrated Circuits (IC). However, with the introduction of advanced node technologies, the application of RE to ICs is turning...
Proceedings Papers

ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 157-171, November 15–19, 2020,
...Abstract Abstract Reverse engineering (RE) is the only foolproof method of establishing trust and assurance in hardware. This is especially important in today's climate, where new threats are arising daily. A Printed Circuit Board (PCB) serves at the heart of virtually all electronic systems...
Proceedings Papers

ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 209-214, November 10–14, 2019,
... of the structural layout, which can be applied towards device debug and reverse engineering. 14nm logic device 3D FIB-SEM tomography 3D-NAND devices 7nm logic device memory channels structural overlay wafer Visualization and Measurements of 3D Structures in Memory and Logic Devices A. Avishai...
Proceedings Papers

ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 249-255, November 10–14, 2019,
...Abstract Abstract Reverse engineering today is supported by several tools, such as ICWorks, that assist in the processing and extraction of logic elements from high definition layer by layer images of integrated circuits. To the best of our knowledge, they all work under the assumption...
Proceedings Papers

ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 283-285, November 10–14, 2019,
...Abstract Abstract Reverse engineering of today’s integrated circuits requires proper sample preparation, high speed imaging and data processing capabilities. The electron-optical design and the data handling architecture of our multi-beam scanning electron microscopes are scalable over a large...
Proceedings Papers

ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 256-265, October 28–November 1, 2018,
..., functional and structural tests) and destructive (full chip reverse engineering). However, these methods cannot detect all types of Trojans and they suffer from a number of disadvantages such as slow speed of detection and lack of confidence in detecting all types of Trojans. Majority of hardware Trojans...
Proceedings Papers

ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 266-271, October 28–November 1, 2018,
... supply voltage signal has a strong effect on the quality of the signal. Semi-invasive read out of the memory content is necessary in order to remotely understand the organization of memory, which finds applications in hardware and software security evaluation, reverse engineering, defect localization...
Proceedings Papers

ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 272-279, October 28–November 1, 2018,
...Abstract Abstract Reverse engineering typically requires expensive equipment, skilled technicians, time, a cross section of the component to be sliced out, and a dedicated reconstruction software. In this paper, we present a low-cost alternative, combining fast frontside sample preparation...
Proceedings Papers

ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 290-294, October 28–November 1, 2018,
..., and electromagnetic (EM) attacks. Because of the large feature size of PCBs (compared to integrated circuits), it is challenging to protect the PCBs from those attacks or proof the suspected attacks. For the same reason, PCBs are vulnerable to non-invasive reverse engineering by X-ray tomography as well...
Proceedings Papers

ISTFA2017, ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis, 299-302, November 5–9, 2017,
...Abstract Abstract This paper proposes a compact and robust topology descriptor for the automated identification of logic gates during the reverse engineering of full integrated circuits (ICs). This gate signature proves to be very insensitive to technology scaling, device sizing or layout...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 308-312, November 6–10, 2016,
...Abstract Abstract For large area, high resolution SEM imaging applications, such as integrated circuit (IC) reverse engineering and connectomics [1-3], SEM instruments are limited by small, uncalibrated fields of view (FOVs) and imprecise sample positioning. These limitations affect image...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 313-316, November 6–10, 2016,
... information is available. Power Distribution analysis requires the highest level of architecture analysis, not feasible by conventional Reverse Engineering (RE) methods or extremely costly. The current paper discusses and demonstrates a new inventive methodology of Power Distribution analysis using known FIB...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 317-326, November 6–10, 2016,
...Abstract Abstract The need for reverse engineering (for IP verification or for reproducibility) has reached unprecedented levels requiring not only the inspection of the circuitry but also the understanding of the packaging and interconnects. Achieving the best X-ray inspection for a particular...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 336-341, November 6–10, 2016,
..., localization of fault sensitive locations on the chip requires reverse-engineering of the utilized building blocks, and therefore, is a tedious task. In this work, we propose an automated technique using readily available IC debug tools to map and profile the fault sensitive locations of programmable logic...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 342-346, November 6–10, 2016,
... hardware backdoors and/or Trojans has primarily focused on detection at various stages in the supply chain. Netlist reverse engineering tools have been investigated as an alternative to existing chip-level reverse engineering methods which can help recover functional netlists from fabricated chips...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 347-356, November 6–10, 2016,
...Abstract Abstract Reverse engineering of electronic hardware has been performed for decades for two broad purposes: (1) honest and legal means for failure analysis and trust verification; and (2) dishonest and illegal means of cloning, counterfeiting, and development of attacks on hardware...