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ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 148-153, November 10–14, 2019,
... to be effective, quick and easy to probe non-invasively with minimal backside sample preparation. electro optical probing failure analysis fault localization integrated circuits laser voltage probing probe pad deposition sample preparation shrinking transistors Case Studies on Application...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 327-335, November 6–10, 2016,
... state-of-the-art Scanning Probe Microscopy (SPM) methods. Only a relatively simple backside sample preparation is necessary for accessing the FG of memory transistors. The technique presented was successfully implemented on a 0.35 μm technology node microcontroller and a 0.21 μm smart card integrated...
Proceedings Papers

ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 274-277, November 1–5, 2015,
...Abstract Abstract Post silicon validation techniques specifically Focused Ion Beam (FIB) circuit editing and Failure Analysis (FA) require backside sample preparation on Integrated Circuits (IC). Although these preparation techniques are typically done globally across the encapsulated...
Proceedings Papers

ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 490-493, November 3–7, 2013,
...Abstract Abstract Post silicon validation techniques on Integrated Circuits (IC) specifically FIB circuit editing require backside sample preparation done by local mold compound and silicon machining. Conventional methods such as Computer Numerically Controlled (CNC) machining and chemical...
Proceedings Papers

ISTFA2012, ISTFA 2012: Conference Proceedings from the 38th International Symposium for Testing and Failure Analysis, 478-484, November 11–15, 2012,
...Abstract Abstract Backside sample preparation is required by many post silicon validation techniques like FIB (Focused Ion Beam) circuit editing and optical probing using Photon Emission or Laser Stimulus methods [1]. In spite of many conventional methods of silicon thinning and polishing, some...
Proceedings Papers

ISTFA2011, ISTFA 2011: Conference Proceedings from the 37th International Symposium for Testing and Failure Analysis, 424-427, November 13–17, 2011,
...Abstract Abstract Post silicon validation techniques require backside sample preparation by silicon thinning techniques. The conventional fixture to this preparation on large die packages causes silicon to crack. A new “4-point bending” fixture was developed to reduce silicon bending strain...
Proceedings Papers

ISTFA2004, ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis, 552-557, November 14–18, 2004,
...Abstract Abstract Ultra-short pulse laser ablation is applied to IC backside sample preparation. It is contact-less, non-thermal, precise and can ablate the various types of material present in IC packages. This study concerns the optimization of ultra-short pulse laser ablation for silicon...
Proceedings Papers

ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 675-682, November 3–7, 2002,
... in the backside sample preparation process. This paper will discuss two different ways for silicon thinning: reactive ion etching (RIE) alone, and RIE in conjunction with mechanical milling. In addition, the characterization and optimization of the RIE process for backside silicon thinning will be discussed...
Proceedings Papers

ISTFA2001, ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis, 179-187, November 11–15, 2001,
...Abstract Abstract An increasing number of analysis techniques requires access to the backside silicon of a functional device. For backside sample preparation of packaged devices, CNC milling tools can perform both package opening and circuit preparation. They offer good versatility in terms...
Proceedings Papers

ISTFA2000, ISTFA 2000: Conference Proceedings from the 26th International Symposium for Testing and Failure Analysis, 161-171, November 12–16, 2000,
...Abstract Abstract This paper presents a comparative study of backside sample preparation techniques with applicability to conventional as well as flip chip package types. We will cover mechanical (grinding and milling tools), chemical (wet and dry chemistries) and other approaches such as laser...
Proceedings Papers

ISTFA2000, ISTFA 2000: Conference Proceedings from the 26th International Symposium for Testing and Failure Analysis, 553-558, November 12–16, 2000,
...Abstract Abstract A new ultra-short pulse laser ablation based backside sample preparation method has been developed. This technique is contact-less, non-thermal, precise, repetitive and adapted to each type of material present in IC packages. Backside preparation examples are presented...