Abstract Laser microchemical etching systems provide enhanced through-wafer IR viewing and provide access for focused ion beam (FIB) tools and e-beam testers on flip-chip packaged die [1]. In demanding applications, laser etching is directed at rates of 100,000 cubic micrometers per second and must be stopped within 10 to 15 micrometers (thickness remaining) of the active flip-chip circuit. In cases where the initial die thickness is known, the laser process is sufficiently reproducible and system depth of focus is sufficiently narrow to place the laseretched floor within an accuracy of about plus or minus 5 micrometers relative to the initial surface of the die. However, greater accuracy is often desired to minimize FIB etch time. In addition, the laser step is often proceeded by a mechanical thinning operation on the die. This mechanical process introduces an uncertainty in initial part thickness, as well as part wedge and bowing. In this paper we describe an optical beam induced current (OBIC) method for accurate closed-loop endpointing with direct reference to the active device surface on the flipped die. The method relies on an exponentially increasing current that is induced by the laser as the device is thinned. Because of the strong absorption of the silicon bulk at visible wavelengths, the signal is sensitive to submicrometer thickness changes and, hence, may be used to stop the laser etching process with high accuracy at the desired 10 to 15 micrometer distance from the active circuit. The new technique has been studied on commercially available devices and shown to be insensitive to localized device junction density. Hence, endpointing is not highly dependent on the circuit design or exact placement of circuit elements. We outline the substrate and circuit properties that are most relevant to accurate implementation of the technique. The laser-etch process dependency of the OBIC signal has also been characterized. Simple high-speed closed loop electronics have been developed in order to apply the method for in situ endpointing New failure analysis/circuit debug techniques, including spectroscopic photoemission and picosecond time-resolved methods rely on observation of weak optical signals through the wafer. These would optimally be viewed though a remaining silicon thickness of a few micrometers or less. The limits of the OBIC endpointing method have been explored for the high-speed preparation of ultra thin local viewing windows in support of these new techniques.

Abstract Laser-based failure-analysis techniques such as optical beam-induced current (OBIC) or optical beam-induced resistance change (OBIRCH) involve scanning a focused laser beam across a sample by means of a laser scanning microscope (LSM). In this paper, we demonstrate a new method of obtaining OBIC data without requiring a laser or an LSM. Instead, we employ new techniques from the field of compressive sensing (CS). We use an incoherent light source and a spatial light modulator in an image plane of the device under test, supplying a series of pseudo-random on/off illumination patterns (structured illumination) and recording the resulting electrical (photocurrent) signals from the device. Advanced algorithms allow us to reconstruct the signal for the entire die. We present results from OBIC measurements on a discrete transistor and discuss extensions of CS techniques to OBIRCH. We also demonstrate static emission images obtained using CS techniques in which the incoherent light source is replaced with a single-element infrared photon detector so that no detector array is required.

Abstract In this study, the challenges to transfer the microelectronics failure analysis techniques to the photovoltaic industry have been discussed. The main focus of this study was the PHEMOS as a tool with strong technological research capacity developed for microelectronics failure analysis, and OBIC (Optical Beam Induced Current) as a non-destructive technique for detecting and localizing various defects in semiconductor devices. This failure analysis tool was a high resolution optical infrared photon emission microscope used mainly in microelectronics for qualitative analysis and localization of semiconductor defects. Such failure analysis equipment was designed to meet requirements for modern microelectronic devices. Characterization of current photovoltaic device often requires quantitative analysis and should provide information about the electrical and material properties of the solar cell. Therefore, in addition to the demand for further data processing of the obtained results we had to study the corresponding operating regime of solar cells to allow for a correct interpretation of measurement results. In this paper, some of the related problems we faced during this study, e.g. large amount of data processing, the spatial misalignment of the images obtained as EL (Electroluminescence) and IR-LBIC (Infrared Light Beam Induced Current), the implemented laser wavelength, its profile and power density for IR-LBIC measurement. These topics have been discussed in detailed to facilitate a reliable transfer of these techniques from microelectronics to the photovoltaic world.

Abstract The increasing popularity of flip-chips brings new challenges to those who must perform device analysis (1). Its ability to accommodate high pin-count and high bandwidth microprocessors, DSPs and complex logic devices is increasing the demand for this technology. Conventional e-beam and mechanical probing techniques currently allow quick and efficient analysis of conventional semiconductor devices. When the surface of the device is not exposed, however, conventional analysis techniques are insufficient and new techniques must be developed. Conventional packaging technologies allow design debug and failure analysis to be performed in a relatively straightforward manner. Analysis from the topside is clearly the preferred technique when possible (2), using specially prepared engineering prototypes, but backside access for dynamic timing analysis is required when topside techniques are exhausted. The flipchip process, however, makes topside analysis impractical in most situations. There are several different techniques that are currently being used for backside analysis. These are emission microscopy (3), optical beam induced current (OBIC) (4), and a combination of software and built in self-test/scan methods (5). These techniques are valuable in helping engineers to analyze and isolate faults for functional failures. These techniques do not, however, provide precise analog waveforms which may be used to perform timing analysis on the device. A backside pulsed laser electro-optic technique for measuring internal node timing (6) has been developed for waveform acquisition. Although this technique permits acquisition of waveforms from a bi-polar device which has had its substrate thinned, it has limited application to CMOS devices, particularly in long duty cycle applications. Milling the backside of devices in order to facilitate backside waveform acquisition is considered by some researchers as a potential approach, but the authors are not aware of any published data on this subject.

Abstract In this paper, we introduce an example of successful failure analysis using combination of several fault localization techniques on a 0.18 um CMOS device. These techniques contain both front and backside localization techniques. Front side techniques are the following: emission microscopy, liquid crystal analysis, and electron beam (e-beam) probing with focused ion beam (FIB) milling. The backside techniques are optical beam induced current (OBIC) and optical beam induced resistance change (OBIRCH). We discuss the fault mechanism, including the relation between the “hot” spot of these analyses and the failure location in the circuit.

Abstract This paper describes a new technique, called the Light-Induced State Transition (LIST) method, that uses an optical beam induced current (OBIC) system for failure analysis of CMOS LSIs. This technique allows the user to locate a low signal line shortcircuited to a GND bus (or a high signal line shortcircuited to a VDD bus) in stand-by condition, which is not possible with conventional failure analysis techniques such as photo-emission analysis, liquid crystal technique, or the conventional OBIC method. The effectiveness of the LIST method was verified by a experiment on inverter chains that included quasi-failures intentionally patched by FIB deposition. The LIST method has also been used for actual CMOS failure analysis, and has proved useful for finding a failure location rapidly.

Abstract The identification of voids and Si nodules in the Al stripes of integrated-circuit-device chips is a key part of failure analysis and process monitoring in the semiconductor industry. The optical-beam-induced resistance-change-detection (OBIRCH) method has been shown to be more useful in void detection than other methods. In this study, the wavelength of the laser used for heating the Al stripes on the Si chips has been changed from 633 to 1300 nm and the OBIRCH method has been modified to use a near-field (NF) optical probe as the heat source instead of a laser beam. Results showed that NF-OBIRCH method has three advantages over the conventional OBIRCH method: its spatial resolution is higher; the OBIRCH caused by heating can be observed using the metallized probe without interference from the optical beam induced current; and the OBIC can be observed using the apertured probe, in a high spatial resolution.

Abstract The application of laser beam based techniques for ESD defect localization in silicon and gallium arsenide integrated circuits is studied. The Thermal Laser Stimulation technique (OBIRCH, TIVA) is shown to precisely localize electrostatic discharge (ESD) defects under low voltage and current consumption, thus avoiding device or defect degradation upon testing. It is also shown that nonbiased Thermal Laser Stimulation (SEI) tests can localize ESD defects in the silicon substrate. Physical analysis revealed that a thermocouple composed of molten silicon with crystalline silicon generated a Seebeck voltage sufficiently large to be detected. Finally, the pulsed Optical Beam Induced Current technique (OBIC) under no bias condition was evaluated and compared to both biased and nonbiased Thermal Laser Stimulation techniques. It proved to be complementary as it offers a different insight into the ESD induced degradation.

Abstract Characterizing and fault localizing sub 0.25μm six level copper BEOL microprocessor RISC designs operating above 450 MHz clock speeds pose significant challenges in functional defect localization and identification. The flip chip designs of these microprocessors with high numbers of I/O outputs can involve backside and frontside fault localization techniques such as emission microscopy, OBIC (Optical Beam Induced Current) using I.R. laser scanning microscopy, LIVA (Light Induced Voltage Alteration) [1,2], and PICA (Picosecond Imaging Circuit Analysis)[3,4], to identify the source of functional failures. Refined backside thinning techniques have been applied to optimize I.R. laser scanning microscopy and PICA localization of functional failures. In addition, products using highly structured test methods such as LSSD(Level Sensitive Scan Design) lend themselves to a highly software diagnosable category [5,6]. Such software diagnostics (LSSD diagnostics) when combined with image based fault localization has proven highly effective in pinpointing defects causing functional failures. Examples of electrical and physical characterization of functional logic failures in the six levels electroplated copper BEOL microprocessors will be described. In addition, the electrical characterization of submicron sized SRAM transistor devices using FIB (Focused Ion Beam Microscopy)deposited probe pads [7] will be detailed along with SEM and TEM micrographs of defects identified in this manner.

Abstract Optical or light beam induced current (OBIC or LBIC) are well known techniques for the analysis of integrated circuits and the study of electrically active materials in material science. They are also natural methods for analysis of photovoltaic cells, as the photocurrent of a photovoltaic cell itself is measured. We present a new measurement setup including graphical user interface software which has been created in a student project by refurbishing a used CNC (Computer Numerical Control) milling machine. The technique is applied to the measurement of the short circuit current of a photovoltaic (PV) cell with dimensions of 154 × 154 mm2.

Abstract A forward voltage (Vf) snapback phenomenon was observed during the analysis of silicon doped gallium-arsenide (GaAs) light emitting diodes (LEOs). In this paper emphasis is placed on both the techniques used during the analysis and the information obtained. Apart from the standard curve tracer characterizations, and utilization of two microsection techniques, significance is placed on the use of a laser scanning microscope (LSM). The LSM has four main analys is features: photoemission (FE) microscopy, optical beam induced current (OBIC), confocal microscopy and infrared laser scanning microscopy [1]. The analysis of the LEOs utilizes two of these features, PE microscopy and OBlC analysis. These techniques are used in a complementary fashion to analyze the forward voltage snapback. The analysis reveals two independent wafer processing related issues, a junction anomaly and an unintentional phantom junction at the substrate to epi interface. Both phenomena can result in the LED Vf snapback.

Abstract With increasing complexity of circuit layout on the die and special packages in which the die are flipped over, failure analysis on the die front side, sometimes, can not solve the problems or is not possible by opening the front side of the package to expose the die front side. This paper discusses fault isolation techniques and procedures used on the back side of the die. The two major back side techniques, back side emission microscopy and back side OBIC (Optical Beam Induced Current), are introduced and applied to solve real problems in failure analysis. A back side decapsulation technique and procedure are also introduced. Last, several examples are given. The results indicated that the success in finding root cause of failure is greatly increased when these techniques are used in addition to the traditional front side analysis approaches.

Abstract The advent of Flip Chip and other complex package configurations and process technologies have made conventional failure analysis techniques inapplicable. This paper covers the ways in which conventional techniques have been modified to meet the FA challenges presented by these new devices – specifically, by forcing analysis to be done from the backside of the device. Modifications to the traditional FA process steps, including new sample preparation methods, changes in hardware, and alterations to physical failure analysis processes are described. To demonstrate the use of backside analytical approaches, some examples of applications and a case study are also included.

Abstract The continuous scaling of memory technology drives, among other things, an increasing vertical integration. The storage capacitor of a memory cell can be formed as a deep trench into the Silicon to allow high capacitance with a minimum footprint. This paper summarizes preparation techniques especially developed for vertical dielectrics, which are used, for example for the deep trench storage capacitor and the vertical access transistor for this capacitor. The preparation methods employ mechanical polishing, focused ion beam milling and chemical etching to allow for some of the best possible inspection in SEMs and TEMs.

Abstract This paper describes optical and electron beam based fault isolation approaches for short and open defects in nanometer-scale through-silicon via (TSV) interconnects. Short defects are localized by photon emission microscopy (PEM) and optical beam-induced current (OBIC) techniques, and open defects are isolated by active voltage contrast imaging in a scanning electron microscope (SEM). The results are confirmed by transmission electron microscopy (TEM) cross-sectioning.

Abstract Applications of MpOBIC (Multi-photon Optical Beam Induced Current) are discussed for use in defect localization. The MpOBIC signals in a ring oscillator under static conditions are examined and demonstrate the superior optical resolution of the system over traditional OBIRCH. A 5-fin diode test structure is examined under passive conditions, demonstrating that true multi-photon OBIC has occurred from the backside. The same diode is examined in forward bias, and the resulting discussion concludes that both OBIC and OBIRCH signals are present in the sample. Thus, we claim that both OBIC and OBIRCH signals can provide device characterization information from an MpOBIC system.

Abstract In this paper, we report on the first observation and study of two-photon absorption (TPA) based laser assisted device alteration (LADA) using a continuous-wave (CW) 1340nm laser. The study was conducted using LADA systems equipped with high numerical aperture (NA) liquid and solid immersion lens objectives on Intel’s 45 nm and 32 nm multiprocessor units (MPU) and test chips. The power densities achievable using these lenses are similar to those reported in the literature for TPA in silicon of CW 1455nm light [1]. We show that the induced photocurrent has a quadratic dependence on the input laser power, a key indicator of two-photon phenomenon. Our results imply that even when using 1340nm wavelength CW lasers, there is a potential for laser invasiveness with the high power densities achievable using high NA objectives. Laser induced damage of the DUT is also a possibility at these high power densities, particularly with the solid immersion lens (SIL). However, we show that the DUT damage threshold can be increased by reducing the DUT’s temperature. Finally, we present results demonstrating a >40% improvement in localization of critical timing faults using TPA based LADA, when compared to traditional 1064nm wavelength (single-photon absorption) LADA.

Abstract Internal IC probing has become an important tool for failure analysis and defect localization. Optical stimulation of logical transients enables the investigation of electrical pulse propagation through IC-regions which are not directly connected to an external input. The signal detection should be as directly as possible to avoid misinterpretation of experimental results, especially for time-resolved measurements. This paper describes the implementation of a capacitive coupling technique on a laser scanning microscope and on a needle prober. Results of static and time-resolved measurements are presented and compared to those obtained by OBIC measurements.

Abstract Microsystems-enabled photovoltaics (MEPVs) are microfabricated arrays of thin and efficient solar cells. The scaling effects enabled by this technique results in great potential to meet increasing demands for light-weight photovoltaic solutions with high power density. This paper covers failure analysis techniques used to support the development of MEPVs with a focus on the laser beam-based methods of LIVA, TIVA, OBIC, and SEI. Each FA technique is useful in different situations, and the examples in this paper show the relative advantages of each method for the failure analysis of MEPVs.

Abstract Damage to encapsulated integrated circuits has recently been reported due to Laser marking of the package. A method to assess the risk of such damage is presented. The method is an analytical technique using Thermally Induced Voltage Alteration (XIVA) and Optical Beam Induced Current (OBIC) imaging.