Magnetic field based techniques have shown great capabilities for investigation of current flows in integrated circuits (ICs). After reviewing the performances of SQUID, GMR (hard disk head technologies) and MTJ existing sensors, we will present results obtained on various case studies. This comparison will show the benefit of each approach according to each case study (packaged devices, flip-chip circuits, …). Finally we will discuss on the obtained results to classify current techniques, optimal domain of applications and advantages.

In this paper, we demonstrate cases for actual short and open failures in FCB (Flip Chip Bonding) substrates by using novel non-destructive techniques, known as SSM (Scanning Super-conducting Quantum Interference Device Microscopy) and Terahertz TDR (Time Domain Reflectometry) which is able to pinpoint failure locations. In addition, the defect location and accuracy is verified by a NIR (Near Infra-red) imaging system which is also one of the commonly used non-destructive failure analysis tools, and good agreement was made.

Magnetic field imaging is a well-known technique which gives the possibility to study the internal activity of electronic components in a contactless and non-invasive way. Additional data processing can convert the magnetic field image into a current path and give the possibility to identify current flow anomalies in electronic devices. This technique can be applied at board level or device level and is particularly suitable for the failure analysis of complex packages (stacked device & 3D packaging). This approach can be combined with thermal imaging, X-ray observation and other failure analysis tool. This paper will present two different techniques which give the possibility to measure the magnetic field in two dimensions over an active device. Same device and same level of current is used for the two techniques to give the possibility to compare the performance.

Defect localization is a very important step in the process of failure analysis for Integrated Circuits. A very important technique, allowing the localization of the defects with a certain degree of precision, is Magnetic Current Imaging. However, this technique has strict limitations related to the working distance and the maximum current magnitude detectable. We overcame these limitations by using a simulation approach, allowing us to sensibly increase the technique resolution and to map currents which are much weaker. This is done by comparing the measurement of the Magnetic Induction Field to a set of simulations of defect assumptions.

The application of an individual failure analysis technique rarely provides the failure mechanism. More typically, the results of numerous techniques need to be combined and considered to locate and verify the correct failure mechanism. This paper describes a particular case in which different microscopy techniques (photon emission, laser signal injection, and current imaging) gave clues to the problem, which then needed to be combined with manual probing and a thorough understanding of the circuit to locate the defect. By combining probing of that circuit block with the mapping and emission results, the authors were able to understand the photon emission spots and the laser signal injection microscopy (LSIM) signatures to be effects of the defect. It also helped them narrow down the search for the defect so that LSIM on a small part of the circuit could lead to the actual defect.

We describe the use of magnetic tunnel junction (MTJ) sensors for the purposes of magnetic current imaging. First, a case study shows how magnetic and current density images generated using an MTJ sensor probe were used to isolate the root cause of failure in a newly-designed ASIC. We then give a brief introduction to the operation and construction of MTJ sensors. Finally, a full comparison is made between the three types of sensors which have been used for magnetic current imaging: giant magnetoresistive (GMR) sensors, superconducting quantum interference devices (SQUIDs), and magnetic tunnel junctions. These three technologies are quantitatively compared on the basis of spatial resolution, sensitivity, and geometry.

SQUID and MR magnetic sensors have separately been used for fault isolation of shorts and resistive opens in integrated circuits and packages. These two technologies were once considered to be mutually exclusive, although recent studies [1] rather pointed to their complementary character. This paper shows, for the first time, the use of these two sensors together to isolate a low resistance short in a Quad-NAND gate microcircuit. Electrical test confirmed low resistance shorts between three of the device pins. However, internal optical inspection found no evidence of failure. The low resistance of the shorts was deemed insufficient for liquid crystal analysis. Magnetic current imaging with a SQUID sensor confirmed current flow through the package lead frame and isolated the defect to the microcircuit. Due to package design and the resulting distance of the scan plane, the SQUID was unable to resolve the current path on the microcircuit. In parallel with the SQUID, a magnetoresistive (MR) probe was employed to fit inside the device cavity, make direct contact with the microcircuit, and map high-resolution current images. Two sites with high-current density were accurately identified by MCI in input transistors. Subsequent deprocessing revealed that the defects were located under a broad sheet of aluminum metallization which blocked optical detection, and rendered detection by thermal emission difficult.

With the arrival of flip-chip packaging, present tools and techniques are having increasing difficulty meeting failure-analysis needs. Recently a magneticfield imaging system has been used to localize shorts in buried layers of both packages and dies. Until now, these shorts have been powered directly through simple connections at the package. Power shorts are examples of direct shorts that can be powered through connections to Vdd and Vss at the package level. While power shorts are common types of failure, equally important are defects such as logic shorts, which cannot be powered through simple package connections. These defects must be indirectly activated by driving the part through a set of vectors. This makes the magnetic-field imaging process more complicated due to the large background currents present along with the defect current. Magnetic-field imaging is made possible through the use of a SQUID (Superconducting Quantum Interference Device), which is a very sensitive magnetic sensor that can image magnetic fields generated by magnetic materials or currents (such as those in an integrated circuit). The current-density distribution in the sample can then be calculated from the magnetic-field image revealing the locations of shorts and other current anomalies. Presented here is the application of a SQUID-based magnetic-field imaging system for isolation of indirect shorts. This system has been used to investigate shorts in two flip-chip-packaged SRAMs. Defect currents as small as 38 μA were imaged in a background of 1 A. The measurements were made using a lock-in thechnique and image subtraction. The magnetic-field image from one sample is compared with the results from a corresponding infrared-microscope image.

In this study we have investigated the magnetic field associated with a current flowing in a circuit using Magnetic Force Microscopy (MFM). The technique is able to identify the magnetic field associated with a current flow and has potential for failure analysis.

As process technologies of integrated circuits become more complex and the industry moves toward flipchip packaging, present tools and techniques are having increasing difficulty in meeting failure analysis needs. One of the most common failures in these types of ICs and packages is power shorts, both during fabrication and in the field. Many techniques such as Emission Microscopy and Liquid Crystal are either not able to locate power shorts or are inhibited in their effectiveness by multiple layers of metal and flip-chip type packaging. A scanning SQUID microscope can overcome some of these difficulties. A SQUID (Superconducting Quantum Interference Device) is a very sensitive magnetic sensor that can image magnetic fields generated by magnetic materials or currents (such as those in an integrated circuit). The current density distribution in the sample can then be calculated from the magnetic field image, and resolutions approaching 5 times the near field limit can be obtained. We present here the application of a SQUID microscope to physical failure analysis and compare it with other techniques to detect shorted current paths in flip-chip mounted ICs and packages.

In this paper, we will present a new technique for fault isolation and failure analysis in integrated circuits based on a scanning magnetoresistive imaging system. By detecting the stray magnetic fields at the surface of a chip using magnetic sensors with sub-micron spatial resolution, we are able to obtain a full map of in-plane current densities, resolving features smaller than 100 nanometers. We will briefly discuss the capabilities and limitations of the technique and will present results on a variety of frontside and backside samples.

The need to increase transistor packing density beyond Moore's Law and the need for expanding functionality, realestate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques and require novel non-destructive, true 3D Failure Localization techniques. We describe in this paper innovations in Magnetic Field Imaging for FI that allow current 3D mapping and extraction of geometrical information about current location for non-destructive fault isolation at every chip level in a 3D stack.

Process challenges and other technology challenges have slowed the implementation of 3D technology into high volume manufacturing well behind the original ITRS expectations. Nevertheless, although full implementation suffered delays, 2.5D through the use of interposer and TSV 3D devices are being already produced, especially in memory devices. These 3D devices (System-in-Package (SiP), wafer-level packaging, Through-Silicon-Vias (TSV), stacked-die, etc.) present major challenges for Failure Analysis (FA) that require novel nondestructive, true 3D Failure Localization techniques. 3D Magnetic field Imaging (MFI), recently introduced, proved to be a natural, useful technique for non-destructively mapping 3D current paths in devices that allowed for submicron vertical resolution. In this paper, we apply this novel technique for 3D localization of an electrically failing complex 2.5D device combining 4Hi-High Bandwidth Memory (HBM) devices and a processor unit on a Si interposer.

While transistor gate lengths may continue to shrink for some time, the semiconductor industry faces increasing difficulties to satisfy Moore’s Law. One solution to satisfying Moore’s Law in the future is to stack transistors in a 3-dimensional (3D) formation. In addition, the need for expanding functionality, real-estate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques. We describe in this paper innovations in Magnetic Field Imaging for FI which have the potential to allow 3D characterization of currents for non-destructive fault isolation at every chip level in a 3D stack.

Subsurface wiring level anomalies in VLSI semiconductor devices are extremely difficult, if not impossible to analyze without de-processing the device to expose suspect wiring. Magnetic Force Microscopy (MFM) is a scanning probe technique that requires minimal sample preparation and has the capability to sense magnetic fields in proximity to thin film conductors with high lateral resolution [1]. In this study, multiple VLSI device conductors were intentionally modified and then the magnetic field around the energized conductors was analyzed using MFM. An overview of the technique and results of the magnetic field analysis are discussed.

With the innovations in packaging technologies which have taken place over the last decade, new assemblies often include an increasing number of dies inside a single package. This is exactly what was predicted by the More than Moore’s paradigm: as the integration of ICs increases, the heterogeneity of the devices found in a single package increases. As a result, the number of potential failures which can appear at assembly level has increased exponentially. At present, no technique has been able to precisely localize defects which are deep inside a complex package. For this reason, a new technique for failure localization for three-dimensional structures is needed. In this paper the technique proposed, based on the coupling of magnetic measurements and simulations, is applied to a three-dimensional structure to precisely localize the current path which is buried deep inside it. A new method, based on parameters fittings of magnetic simulations, is then applied in order to accurately evaluate the distance between the current and the sensor.

Magnetic Field Imaging (MFI) and Thermal Laser Stimulation (TLS) failure analysis (FA) techniques (e.g. OBIRCH, XIVA, ect.) both have advantages and disadvantages. The obstacles encountered from these techniques may hinder further fault isolation (FI), lengthen turn-around-time and/or detract from actionable results. MFI using a Giant Magneto Resistance (GMR) sensor is compared to TLS techniques to understand the capability of the MFI technique at finding shorting defects. A short within a capacitor bank is successfully isolated using both techniques.

A Flip Chip sample failed short between power and ground. The reference unit had 418Ω and the failed unit with the short had 16.4Ω. Multiple fault isolation techniques were used in an attempt to find the failure with thermal imaging and Magnetic Current Imaging being the only techniques capable of localizing the defect. To physically verify the defect location, the die was detached from the substrate and a die cracked was seen using a visible optical microscope.

Interposers used in 2.5D technologies introduce new challenges for Electric Fault Isolation (EFI) due to the multiple layers of silicon, metal layers, Through Silicon Vias (TSV), solder bumps and/or copper pillars making it hard for standard EFI techniques, such as thermal and optical techniques, to localize failures due to the opaqueness of these materials [1, 2, 3]. In this paper we show that shorts in 2.5D Integrated Circuits (IC) technologies can be localized accurately in x, y and z-direction using Magnetic Current Imaging (MCI) while injecting a low power current and showing that the materials used in 2.5D semiconductor manufacturing are fully transparent to magnetic fields.

Scanning superconducting quantum interference device (SQUID) microscopy using high-TC SQUID sensor has been slowly gaining acceptance in the failure analysis (FA) community as a number of silicon device manufacturers are applying the tool and technique to an ever-broadening spectrum of silicon technologies for detecting the location of leakage and short failures by imaging the current path through the die and package. This paper will present the application of scanning SQUID microscopy to short isolation on die and explore the integration of this technique into the FA flow. From the examples presented in this paper, it can be seen that die level short isolation has been possible even when the separation from SQUID sensor to current is about 800-900µm. Several potentially useful techniques that will increase the accuracy of locating the die level short nondestructively are also discussed.