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logic state imaging

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Proceedings Papers

ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 65-72, November 9–13, 2014,
...Abstract Abstract Logic State Imaging (LSI) using Infra-Red Emission Microscopy (IREM) [1-4] has been an indispensable technology for silicon CMOS process development and product debug applications. Its main limitations are relatively poor spatial resolution due to the broadband near-infrared...
Proceedings Papers

ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 21-24, November 1–5, 2015,
...Abstract Abstract A laser based logic state imaging (LLSI) by activating transient voltage collapse (TVC) circuits of SRAM blocks is demonstrated. In order to induce a voltage modulation on a power rail, significant numbers of TVC units are activated. The image quality of LLSI strongly depends...
Proceedings Papers

ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 531-537, November 3–7, 2002,
... and reduced complexity compared with dynamic probing techniques. CMOS dynamic probing failure analysis infrared emission integrated circuits silicon Infrared Emission-based Static Logic State Imaging on Advanced Silicon Technologies Daniel R. Bockelman, Steven Chen, Borna Obradovic Intel...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 154-162, October 31–November 4, 2021,
... security measures. Attackers usually exploit one of several interactions between light and semiconductors to generate logic-state images that reflect data in memory. Thermal laser stimulation (TLS) and laser probing via electro-optical frequency mapping (EOFM) have been reported in the literature...
Proceedings Papers

ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 345-348, October 28–November 1, 2018,
... and fault isolation of advanced node semiconductor devices. These techniques were E-beam logic state imaging, electron-beam signal image mapping, and E-beam device perturbation. Two tools that can offer all three techniques were constructed and used in production. The techniques have been successfully...
Proceedings Papers

ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 100-102, November 15–19, 2020,
... and the analysis of the SRAM array with EBP and EBP of metal lines. By utilizing EBP, it has been demonstrated that logic state imaging, SMI, and waveform have significantly improved spatial resolution compared to the current optical fault isolation analogues. active voltage contrast electron beam probing...
Proceedings Papers

ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 40-45, November 6–10, 2005,
... infrared emission logic state imaging. Recent tool enhancements leading to more efficient fault isolation and debug are reviewed. Cases are presented from debug of 65nm products showing how this methodology was used to achieve very low throughput times on a variety of complex new failure mechanisms...
Proceedings Papers

ISTFA2017, ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis, 207-213, November 5–9, 2017,
... on this matching result is enabled. Further works are required for understandings of simulated phase images in compound logic cells having many states or high-Z states. compound logic gates electro-optical frequency mapping failure analysis phase image simulation Electro-Optical Frequency Mapping Phase...
Proceedings Papers

ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 52-56, November 1–5, 2015,
... hot carriers (such as thermal emissions). A good recent summary of IR emission mechanisms can be found here [6]. The IREM technique has been successfully used in debugging failures on Intel s next-generation technology, including using logic-state imaging (see Figure 1). This example shows emissions...
Proceedings Papers

ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 179-188, November 1–5, 2015,
... magnifications are used to identify circuit blocks. Time-integrated and time-resolved photon emission data is used to identify gate logic states, sequences of events, and specific functional activity. Backscattered electron and scanning transmission electron images mosaics are used to reverse engineer individual...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 483-488, November 15–19, 1998,
.... This optical technique has been named “PICA”, for picosecond imaging circuit analysis. PICA relies on the fact that an FET in a CMOS circuit emits a picosecond pulse of light each time the logic gate changes state. The source of this emission is explained. The PICA technique, which combines optical imaging...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 414-417, October 31–November 4, 2021,
... is used to isolate logic structure failures through SEM image contrasts. By landing SEM probe tips on exposed metal pads and controlling logic states via an applied bias, different levels of contrast are created highlighting structural failure locations. Die-level sample preparation combined with e-beam...
Proceedings Papers

ISTFA2017, ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis, 191-195, November 5–9, 2017,
... to cope with - respectively - decreased supply voltages and currents [9]. One way to avoid the use of scan chains is Laser Logic State Imaging (LLSI), which has recently been published [10]. Here, a small modulation is imposed on the power supply, which enables direct read-out of the state in logic gates...
Proceedings Papers

ISTFA2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis, 266-271, October 28–November 1, 2018,
... isolation technique in the failure analysis field. It has also found applications in the area of security analysis [4-5]. Niu et al. used the EOFM technique for logic state imaging, which gives a better resolution, higher SNR and time improvement for low supply voltages when compared with PE [3]. In [6...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 27-31, November 6–10, 2016,
... has not proved to be overly sensitive in triggering device alteration even though the visible laser has a strong effect seen in waveform probing. VCC-modulated Logic State Imaging: This method, developed recently [14], has not shown to be particularly effective in VLP to date. More data needs...
Proceedings Papers

ISTFA2012, ISTFA 2012: Conference Proceedings from the 38th International Symposium for Testing and Failure Analysis, 411-416, November 11–15, 2012,
... Bockelman, S. Chen, and B. Obradovic, Infrared emission-based static logic state imaging on advanced silicon technology, Proc. ISTFA, 2002, pp. 531-537 [6] E.I. Cole Jr., P. Tangyunyong, D.A. Benson, D.L. Barton, TIVA and SEI Developments For Enhanced Front And Backside Interconnection Failure Analysis...
Proceedings Papers

ISTFA2004, ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis, 52-57, November 14–18, 2004,
...] J. Vickers, N. Pakdaman and S. Kasapi, Prospects of Time-Resolved Photon Emission as a Debug Tool , Proc. ISTFA, 2002, pp. 645-653. [24] D.R. Bockelman, S. Chen and B. Obradovic, Infrared emission-based static logic state imaging on advanced silicon technology , Proc. ISTFA, 2002, pp. 531-537. [25...
Proceedings Papers

ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 510-516, November 6–10, 2005,
... was further verified by pico-probe. SEM image revealed a gate-to-source leakage on the scanout inverter (NMOS side) Figure 10: Shmoo plot showed no passing region Figure 11: Schematic of the latches and off-state leakage emission mapped to corresponding logic values Figure 12: ILD defect is detected between...
Proceedings Papers

ISTFA2008, ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis, 383-389, November 2–6, 2008,
...-Based Logic State Imaging on Advanced Silicon Technologies , Proc. ISTFA, 2002, pp. 531-537 [2] M. Bruce, V. Bruce, ABCs of Emission Microscopy , Electronic Device Failure Analysis, Vol. 5, Issue 3, 2003, pp. 13-20 [3] K. Nikawa and S. Tozaki, Novel OBIC Observation Method for Detecting Defects in Al...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 514-519, November 6–10, 2016,
...., Laser Logic State Imaging (LLSI Proc. 40th Int l Symp for Testing and Failure Analysis, Houston, Texas, USA, November 2014, pp. 65- 72. [13] Gannaway, J.N. and Sheppard, C.J.R., Second-harmonic imaging in the scanning optical microscope, Optical and Quantum Electronics, Vol. 10, No. 5, (1978) pp.435...