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field programmable gate arrays

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Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 336-341, November 6–10, 2016,
...Abstract Abstract Programmable logics, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs), are widely used in security applications. In these applications cryptographic ciphers, physically unclonable functions (PUFs) and other security primitives...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 423-429, October 31–November 4, 2021,
... in thinned devices. We present impacts of global thinning on device performance and reliability of 28 nm node field programmable gate arrays (FPGA). Devices are thinned to values of 50, 10, and 3 microns using a micromachining and polishing method. Lattice damage, in the form of dislocations, extend about 1...
Proceedings Papers

ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 445-447, November 3–7, 2013,
... and electron microscopes were used to successfully isolate and capture a die level poly gate defect in a Field Programmable Gate Array (FPGA) package. Electrical Fault Isolation A 45nm technology FPGA package failed functional tests at room temperature. With the use of binary search method, the failing path...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 172-178, October 31–November 4, 2021,
...), Field Programmable Gate Array (FPGA), and Proposed Micro Electro Mechanical System (MEMS) relationships to PCB Obfuscation for manufacturing volume and complexity of design. II. BACKGROUND ON PCB OBFUSCATION, MEMS DEVICES, AND ADDITIVE MANUFACTURING Complex Programmable Logic Device (CPLD) are used...
Proceedings Papers

ISTFA2010, ISTFA 2010: Conference Proceedings from the 36th International Symposium for Testing and Failure Analysis, 254-256, November 14–18, 2010,
... lens. The ultimate resolution of this particular setup, as with any other IR microscope, will be determined by the diffraction limit of the infrared light transmitted through the substrate. The devices imaged here are commercially available 65 nm field programmable gate arrays. These devices were...
Proceedings Papers

ISTFA2017, ISTFA 2017: Conference Proceedings from the 43rd International Symposium for Testing and Failure Analysis, 299-302, November 5–9, 2017,
...- specific IC (ASIC) or field-programmable gate array (FPGA). The topology matching concept at logic gate level means the comparison of transistor networks in terms of device connectivity only. This is the reason why such an identification strategy is robust against CMOS technology scaling, individual device...
Proceedings Papers

ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 43-48, November 9–13, 2014,
... surfac- es [6]. 3D ICs, on the other hand, will stack two or more dies (active-on-active) on top of each other using TSV technology by stacking the chips normally placed on a Printed Circuit Board (PCB) in one device [5]. Field Programmable Gate Array (FPGA) manufacturers have been early adopters...
Proceedings Papers

ISTFA2012, ISTFA 2012: Conference Proceedings from the 38th International Symposium for Testing and Failure Analysis, 286-289, November 11–15, 2012,
... localization field-programmable gate arrays pattern matching root cause analysis time resolved imaging Time resolved imaging solving FPGA logic fault localization by pattern matching technique G. Bascoul, P. Perdu Centre National d Etudes Spatiales, 18 avenue Edouard Belin, 31401 Toulouse, France J. Di...
Proceedings Papers

ISTFA2004, ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis, 409-413, November 14–18, 2004,
... patterns are generated for each metal layer. The results not only indicate the severity of defects for each metal layer, but also accurately isolate open/short defects. failure analysis fault isolation field-programmable gate arrays metal interconnect defects Defect Snap Shot: Quick Isolation...
Proceedings Papers

ISTFA2012, ISTFA 2012: Conference Proceedings from the 38th International Symposium for Testing and Failure Analysis, 95-99, November 11–15, 2012,
... a package on package configuration [1]. Figure 1 illustrates the schematic of a typical SIP, where a field-programmable gate array (FPGA), in the form of a ball grid array (BGA) package, was mounted in tandem with a flip chip CPU die onto a common package substrate. The resultant joint between the FPGA...
Proceedings Papers

ISTFA2008, ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis, 485-489, November 2–6, 2008,
... encapsulation process. Using the failure analysis results alterations were made to the assembly process which have reduced the occurrence of Vdd-GND shorts. automatic test equipment dielectric breakdown electro static discharge epoxy encapsulation failure analysis field-programmable gate array...
Proceedings Papers

ISTFA2021, ISTFA 2021: Tutorial Presentations from the 47th International Symposium for Testing and Failure Analysis, d1-d96, October 31–November 4, 2021,
... data or secrets from the device. Devices that can be attacked: FPGAs (Field Programmable Gate Arrays) CPLDs (Complex Programmable Logic Devices) Microcontrollers Attack Approaches Plaintext data extraction SRAM / BBRAM (Battery Backup RAM) read-out and key extraction Key extraction...
Proceedings Papers

ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 84-90, November 15–19, 2020,
... due to hyperfine interaction between the NV and the 15N nucleus. 85 magnetic bias field, yielding the magnetic field contribution from the IC alone. The Xilinx 7-series Artix FPGA (XC7A200T-2FBG676C) shown in Fig. 2(a) is selected for this study. This field programmable gate array (FPGA) has a 11 x 12...
Proceedings Papers

ISTFA2014, ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis, 49-54, November 9–13, 2014,
... of the methodologies. failure analysis field programmable gate arrays semiconductor devices three-dimensional integrated circuits Applying Innovative Techniques for Solving FA Challenges of 3D IC Failures Utilizing Conventional Equipment Phoumra Tan, Kenny Ng, Eric Thorne, S.Y. Pai, Doug Hamilton, Dan Nuez...
Proceedings Papers

ISTFA1997, ISTFA 1997: Conference Proceedings from the 23rd International Symposium for Testing and Failure Analysis, 267-272, October 27–31, 1997,
... - y 0.00 V Figure 3 a) Optical picture of EEPROM array with the failing site indicated by arrow; b) Curve tracer I-V characteristic measured between gate and source-drain of the identified select transistor. a b (a.b) - polysilicon removed in hydrazine solution Field Oral Field Control gate i, "Pit...
Proceedings Papers

ISTFA2020, ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis, 42-45, November 15–19, 2020,
... of programmable, erasable, and large storage capabilities, NAND flash memory is widely used in computer memory storage medium such as solid-state disk, USB flash drive and memory cards. Figure 1: A cross-section structure of a single string in NAND flash memory array. The word line (WL) is control gate which...
Proceedings Papers

ISTFA2013, ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis, 173-181, November 3–7, 2013,
... by a custom field-programmable gate array (FPGA) applications board and associated software. Optical interrogation of the device for simultaneous confocal reflection and optoelectronic imaging was performed by a femtosecond 1280nm laser scanning microscope (LSM) using both a 0.8NA (100X) air-objective lens...
Proceedings Papers

ISTFA2016, ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis, 327-335, November 6–10, 2016,
.... CHES Workshop, 2015 [17] V. Korchnoy: Investigation of Choline Hydroxide for selective Silicon etch from a gate oxide failure analysis standpoint. 2002 [18] J. Colvin: A new technique to rapidly identify low level gate oxide leakage in field effect semiconductors using a scanning electron microscope...
Proceedings Papers

ISTFA2005, ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis, 256-261, November 6–10, 2005,
... control gate being grounded and its source floating. Field oxide the FGT control gate while programming a 0b (erased blocked state) with the FGT drain floating and its source being grounded. [3] Figure 2: SEM cross section parallel to word lines (poly 2) showing the FGT physical structure of the 128...
Proceedings Papers

ISTFA2015, ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis, 21-24, November 1–5, 2015,
... a circuit diagram of the TVC circuit which generates a transient Vcc,cell droop with varying durations through a programmable pulse generator. Oscilloscope waveforms of the programmable pulse generator are captured in Figure 4. SRAM array Vcc,cell TVC Vcc,SRAM Programmable Pulse Generation Circuit Figure 3...