1-20 of 2007 Search Results for

device

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Proceedings Papers

ISTFA2007, ISTFA 2007: Conference Proceedings from the 33rd International Symposium for Testing and Failure Analysis, 34-40, November 4–8, 2007,
... node at the device level, and discusses options for probing and discrete characterization. atomic force probing failure analysis focused ion beam integrated circuit modification semiconductor devices FIB Backside Circuit Modification at the Device Level, Allowing Access to Every Circuit...
Proceedings Papers

ISTFA2002, ISTFA 2002: Conference Proceedings from the 28th International Symposium for Testing and Failure Analysis, 403-407, November 3–7, 2002,
...Abstract Abstract Modifications directly to a transistor’s source/drain and polysilicon gate through the backside of a SOI device were made. Contact resistance data was obtained by creating contacts through the buried oxide layer of a manufactured test structure. A ring oscillator circuit...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 53-58, October 31–November 4, 2021,
... evolved to meet more demanding specifications. Certain embodiments of these NPNs, however, pose difficulties in failure analysis. Vertical NPN BJTs, with nanometer thick junctions extending several microns in length, are one such example. Although the high aspect ratio dimensions of these devices provide...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 135-140, October 31–November 4, 2021,
...Abstract Abstract This paper describes an accurate and controllable delayering process to target defects in new materials and device structures. The workflow is a three-step process consisting of bulk device delayering by broad Ar ion beam milling, followed by plan view specimen preparation...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 274-278, October 31–November 4, 2021,
...Abstract Abstract Convention hand polishing, which is widely used for delayering, is becoming increasingly difficult as metal lines and stacks in semiconductor devices get thinner. For one thing, endpointing at the exact targeted layer and region of interest is a major challenge. The presence...
Proceedings Papers

ISTFA2021, ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis, 410-413, October 31–November 4, 2021,
...Abstract Abstract This paper presents a development in semiconductor device delayering by broad ion beam milling that offers a uniform delayering area on a millimeter scale. A milling area of this size is made possible by the user's ability to position ion beams individually to cover...
Proceedings Papers

ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 336-339, November 10–14, 2019,
...Abstract Abstract Non-volatile memory is the most important memory device in IC chips. As a memory, embedded non-volatile memory (NVM) is a fundamental structure in many kinds of semiconductor devices. It is commonly used in the modern electrical appliance as a code or data memory...
Proceedings Papers

ISTFA2019, ISTFA 2019: Conference Proceedings from the 45th International Symposium for Testing and Failure Analysis, 340-345, November 10–14, 2019,
... and complex especially for automotive Complementary Metal–Oxide–Semiconductor (CMOS) devices, this because it involves human lives and safety. In foundries failure analysis (FA), Transmission Electron Microscopy (TEM) analysis often required in order to provide insights into the defect mechanisms and the root...
Proceedings Papers

ISTFA1996, ISTFA 1996: Conference Proceedings from the 22nd International Symposium for Testing and Failure Analysis, 169-173, November 18–22, 1996,
...Abstract Abstract Stress induced pinholes, cracks, and 'craters' have been found in the gate oxide of a double level metal, single level poly CMOS device containing both analog and digital circuits. These defects have been found randomly across the die in active gate regions, and were found...
Proceedings Papers

ISTFA1996, ISTFA 1996: Conference Proceedings from the 22nd International Symposium for Testing and Failure Analysis, 257-262, November 18–22, 1996,
... could be described accurately using SPICE simulations. The measurements have been used to explain the CDM failure mode characteristics of the NMOS protection transistor. charged device model electron-beam measurement electrostatic discharge protection failure analysis NMOS transistors...
Proceedings Papers

ISTFA1997, ISTFA 1997: Conference Proceedings from the 23rd International Symposium for Testing and Failure Analysis, 31-37, October 27–31, 1997,
...Abstract Abstract An investigation into latent CMOS device isolation failures during the process development phase of an advanced 0.35 μm CMOS ASIC process is presented. The failure mechanism manifested itself electrically during wafer sort as a non-typical Iddq distribution and subsequently...
Proceedings Papers

ISTFA1997, ISTFA 1997: Conference Proceedings from the 23rd International Symposium for Testing and Failure Analysis, 121-123, October 27–31, 1997,
.... No electric-migration and dendrite formation was noticed after the Gold deposition was subjected to continuous current flow. However, the thermal stability of the pre-cursor gas is low and will need further refinement. (1,2,6) failure analysis focused ion beam gold films IC device modification IC...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 31-39, November 15–19, 1998,
...Abstract Abstract The use of scanning kelvin probe microscopy (SKPM) for analyzing two-dimensional dopant profiles on production-level silicon CMOS devices is described, with images of topography and dopant profiles presented. Both plan-view and crosssectional analyses are performed to measure...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 163-168, November 15–19, 1998,
...Abstract Abstract Enhancement of Existing Fault Isolation Techniques for CMOS VLSI Failure Analysis is important in keeping pace with device design and process technologies. Recently, we enhanced our photoemission microscopy capability by applying heat to the device during analysis1...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 247-252, November 15–19, 1998,
... or graph and real-time data transmission to a dedicated server Digital Alpha 4100. The Management Module includes approval of the request for analysis from the Client Module, creation of reports about analysis results and statistical service for the subjects like failure modes in a device, operation time...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 337-344, November 15–19, 1998,
...Abstract Abstract EMS analysis is widely used in the failure analysis of the semiconductor. Moreover, the availability is widely evaluated. However, EMS analysis is not often used for the defect (1 Bit failure, Word Line failure, Bit Line failure, etc.) in the cell area in the memory device...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 347-352, November 15–19, 1998,
...Abstract Abstract Devices that are sealed with a process using flux (all solder seals, some brazed seals some weld seals, etc.) will have residual flux entrapped. Devices with an internal construction such that areas exist where solvents can not completely clean surfaces exposed to flux vapor...
Proceedings Papers

ISTFA1998, ISTFA 1998: Conference Proceedings from the 24th International Symposium for Testing and Failure Analysis, 359-362, November 15–19, 1998,
... capacitors Innovative Application of a Passive Device Failure Analysis Technique to a JFET J. J. Erickson and M. J. Ditz Hughes Space and Communication Company El Segundo, California Contact Information: James J. Erickson Hughes Space and Communications Co. Bldg. S41/A350 909 N. Sepulveda Bl. El...
Proceedings Papers

ISTFA1999, ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis, 183-188, November 14–18, 1999,
.... accelerated operational test accuracy gallium arsenide field effect transistors gate leakage current junction temperature thermal resistance 183 A Technique for Measuring Device Temperature with High Accuracy in Accelerated Operational Life Tests K. Takeda, M. Harigaya, Y. Miyazaki NEC Corporation...
Proceedings Papers

ISTFA1999, ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis, 247-254, November 14–18, 1999,
...Abstract Abstract Device repair using Focused Ion Beam(FIB) systems has been in use for most of the last decade. Most of this has been done by people who have been essentially self-taught. The result has been a long learning curve to become proficient in device repair. Since a great deal...