Abstract This paper reports optimized Transmission Electron Microscopy (TEM) sample preparation methods with Focus Ion Beam (FIB), which are used to reduce or avoid the overlapping of TEM images. Several examples of optimized cross-section sample preparation on 38nm and 45nm pitch are provided with general and novel FIB methods. And its application to plan view TEM sample preparation is also shown. The results establish that the proposed method is useful to reduce or remove pattern overlapping effects in dense structures and can produce higher quality TEM images than can be obtained using conventional top-down FIB-based TEM preparation methods.

Abstract The FinFET has been introduced in the last decade to provide better transistor performance as the device size shrinks. The performance of FinFET is highly sensitive to the size and shape of the fin, which needs to be optimized with tighter control. Manual measurement of nano-scale features on TEM images of FinFET is not only a time consuming and tedious task, but also prone to error owing to visual judgment. Here, an auto-metrology approach is presented to extract the measured values with higher precision and accuracy so that the uncertainty in the manual measurement can be minimized. Firstly, a FinFET TEM image is processed through an edge detecting algorithm to reveal the fin profile precisely. Finally, an algorithm is utilized to calculate out the required geometrical data relevant to the FinFET parameters and summarizes them to a table or plots a graph based on the purpose of data interpretation. This auto-metrology approach is expected to be adopted by academia and/or industry for proper data analysis and interpretation with higher precision and efficiency.

Abstract Ultra-thin (<100 nm) flakes shorting metal lines are difficult to detect and often cause the device to fail after reliability stress or at the customer site. In most cases, the common technique of inspecting the device in an optical microscope followed by conventional low energy (<3.0 kV) scanning electron microscopy (SEM) is often not able to detect this type of defect. In rare cases, where the defect is successfully exposed by the traditional procedure, it is very challenging to perform additional transmission electron microscopy (TEM) characterization of the defect without introducing arifacts during sample preparation of the exposed flake. A new procedure to identify these defects using a combination of face-lapping and high energy (>10 kV) SEM imaging is described in this paper. In this method, the failing device is carefully face-lapped and inspected frequently using a high energy (>10 kV) scanning electron beam. The high energy electron beam penetrates through the oxide layer and detects features embedded below the oxide. This technique greatly incresases the chances of detecting the flake, as the method is capable of detecting the defect at a larger range of oxide thickness as opposed to the traditional method. Additionally, TEM results were improved when the ultra-thin flakes were detected below the surface with the high energy SEM technique. Several examples of ultra-thin flakes found using the high energy SEM vs. low energy SEM will be presented.

Abstract We present application examples of site specific energy filtered transmission electron microscopy (EFTEM) analysis using advanced focused ion beam (FIB) specimen preparation techniques. Specifically, we address topics such as throughput and reliability enhancement by chemically assisted broad ion beam milling and on-line monitoring of the etch process. We discuss how integrated elemental analysis by EFTEM can be used to gain quantitative information on the broad variety of new material systems currently entering front end and back end of the IC manufacturing process line. The accelerating pace of device integration results in extreme demands for quantitative analysis in process development, yield ramp-up and process control with spatial resolution and elemental sensitivity at the very limits of currently available instrumentation. Historically, the high resolution performance of TEM analysis has been hampered by long turn around times for the required sample preparation. Meanwhile the routine use of FIB systems for “trench” and “lift-out” preparation techniques allows for an enormous increase in the efficiency of TEM analysis.

Abstract Transmission Electron Microscopy (TEM) and scanning TEM (STEM) is widely used to acquire ultra high resolution images in different research areas. For some applications, a single TEM/STEM image does not provide enough information for analysis. One example in VLSI circuit failure analysis is the tracking of long interconnection. The capability of creating a large map of high resolution images may enable significant progress in some tasks. However, stitching TEM/STEM images in semiconductor applications is difficult and existing tools are unable to provide usable stitching results for analysis. In this paper, a novel fully automated method for stitching TEM/STEM image mosaics is proposed. The proposed method allows one to reach a global optimal configuration of each image tile so that both missing and false-positive correspondences can be tolerated. The experiment results presented in this paper show that the proposed method is robust and performs well in very challenging situations.

Abstract Electron-beam induced radiation damage can give rise to large structural collapse and deformation of low k and ultra low k IMD in semiconductor devices, posing great challenges for failure analysis by electron microscopes. Such radiation damage has been frequently observed during both sample preparation by dual-beam FIB and TEM imaging. To minimize radiation damage, in this work we performed systematic studies on every possible failure analysis step that could introduce radiation damage, i.e., pre-FIB sample preparation, FIB milling, and TEM imaging. Based on these studies, we utilized comprehensive technical solutions to radiation damage by each failure analysis step, i.e., low-dose/low-kV FIB and low-dose TEM techniques. We propose and utilize the low-dose TEM imaging techniques on conventional TEM tools without using low-dose imaging control interface/software. With these new methodologies or techniques, the electron-beam induced radiation damage to ultra low k IMD has been successfully minimized, and the combination of single-beam FIB milling and low-dose TEM imaging techniques can reduce structure collapse and shrinkage to almost zero.

Abstract Imaging tomography by transmission electron microscopy (TEM) is a technique which has been growing in popularity in recent years, yet it has not been widely applied to semiconductor defect studies and root cause determination [1- 3]. In part this is due to the complex equipment, computing needs, and microscope time required to generate the various images which ultimately compose the data set. However, the latest generation of TEMs—with their high level of stability and automation—are greatly reducing the resource needs to create high quality and informative movies of defects rotating about a central axis. One significant advance is the reduction in time required to fabricate a sample and perform the data acquisition by TEM. Today’s microscopes allow for sample fabrication to take place in a few hours or less and can acquire more than 100 images in about an hour at different sample tilt conditions with minimal analyst intervention. This paper describes using automated TEM sample preparation with dual beam focused ion beams (previously reported [4]) in conjunction with automated tomography software on a state-of-the-art TEM. By using an advanced tomography holder ±70° of tilt can be obtained. This is a powerful way to view defects as the failure can be viewed through more than 90° of rotation. Consequently a more complete understanding of the failure site can be obtained over a typical single projection TEM image. This can greatly facilitate root cause determination in a timely manner.

Abstract Traditional plane-view TEM images, which have large fields of view and are usually used to check the existence of dislocations, cannot tell whether a dislocation goes through the p-n junction or not. While XTEM images tell the local depth of a small part of a dislocation only, other methods have to be developed to explore how a dislocation goes in the substrate. In this article, the authors have modified the technique of stereo TEM, which was used to study the 3D shapes of precipitates, to study how a dislocation runs in the Si substrate. Three images recorded after tilting the TEM sample were used for measuring the dislocation depth profile. The distances between a few chosen points on the dislocation and the reference line were measured from above three images. Results suggested that the depth profiles of dislocations in the Si substrate can be accurately determined by stereo TEM.

Abstract A dual beam FIB (Focused Ion Beam) system which provides the ion beam (i-beam) and electron beam (e-beam) function are widely used in semiconductor manufacture for construction analysis and failure cause identification. Although FIB is useful for defect or structure inspection, sometimes, it is still difficult to diagnose the root cause via FIB e-beam image due to resolution limitation especially in products using nano meter scale processes. This restriction will deeply impact the FA analysts for worst site or real failure site judgment. The insufficient e-beam resolution can be overcome by advanced TEM (Transmission Electron Microscope) technology, but how can we know if this suspected failure site is a real killer or not when looking at the insufficient e-beam images inside a dual beam tool? Therefore, a novel technique of device measurement by using C-AFM (Conductive Atomic Force Microscope) or Nano-Probing system after cross-sectional (X-S) FIB inspection has been developed based on this requirement. This newly developed technology provides a good chance for the FA analysts to have a device characteristic study before TEM sample preparation. If there is any device characteristic shift by electrical measurement, the following TEM image should show a solid process abnormality with very high confidence. Oppositely, if no device characteristic shift can be measured, FIB milling is suggested to find the real fail site instead of trying TEM inspection directly.

Abstract Plan view TEM imaging is a powerful technique for failure analysis and semiconductor process characterization. Sample preparation for near-surface defects requires additional care, as the surface of the sample needs to be protected to avoid unintentionally induced damage. This paper demonstrates a straightforward method to create plan view samples in a dual beam focused ion beam (FIB) for TEM studies of near-surface defects, such as misfit dislocations in heteroepitaxial growths. Results show that misfit dislocations are easily imaged in bright-field TEM and STEM for silicon-germanium epitaxial growth. Since FIB tools are ubiquitous in semiconductor failure analysis labs today, the plan view method presented provides a quick to implement, fast, consistent, and straightforward method of generating samples for TEM analysis. While this technique has been optimized for near-surface defects, it can be used with any application requiring plan view TEM analysis.

Abstract To find defects and their root cause in semiconductor devices has become more and more difficult as chip size dramatically drops. A novel method combining FIB sequential cross-sectioning and TEM is described in this paper. This combination has provided a powerful tool for defect mechanism analysis. FIB slicing through a failed cell can be controlled to a precision of 0.1 micron. Passive voltage contrast imaging with FIB enhances defect detection. After a defect is found, in-situ TEM sample is prepared with FIB milling. By putting together the series FIB images along side with the TEM images and its associated high resolution EDS data, the detailed defect formation mechanism was discovered and feedback to process engineering for process improvement.

Abstract Recent developments in transmission electron microscopy (TEM) sample preparation have greatly reduced the time and cost for preparing thin samples. In this paper, a method is demonstrated for viewing thin samples in transmission in an unmodified scanning electron microscope (SEM) using an easily constructed sample holder. Although not a substitute for true TEM analysis, this method allows for spatial resolution that is superior to typical SEM imaging and provides image contrast from material structure that is typical of TEM images. Furthermore, the method can produce extremely high resolution x-ray maps that are typically produced only by scanning transmission electron microscope (STEM) systems.

Abstract The demand for shifting from lead-containing to lead-free solder materials as well as the ongoing efforts for an improvement of the solder joint robustness for fine-pitch ball grid array packages requires ongoing testing of fresh solder alloys, changes in landing pad metallization and reflow processes. This testing includes mechanical and thermal stress tests and a detailed failure and material analysis. Besides the commonly used analysis methods like optical microscopy, scanning electron microscope (SEM) imaging of cross sections, fracture planes and energy dispersive X-ray compositional analyses, other techniques such as ion channeling contrast and transmission electron microscope (TEM) imaging can provide valuable information on intermetallic compounds (IMC) formation at solder joint interfaces. This paper discusses the advantages of SEM imaging of IMC morphology at the pad interface resulting from solder ball etching, focused ion beam imaging of solder ball cross sections with ion channeling contrast, and TEM analyses of failures.

Abstract For 22nm technology node and beyond, fully depleted devices such as FinFET and ETSOI are leading candidates. Certain critical dimensions of such devices are well below 10nm, and only transmission electron microscopy (TEM) has the resolution to provide measurement with sub-nanometer accuracy. Due to the projection effect of TEM technique, comprehensive understanding of the 3D structure from 2D images is needed for process development of FinFET. This paper will address sample preparations and TEM imaging techniques for FinFET device at sub-100nm pitch.

Abstract The failure analysis using transmission electron microscopy (TEM) has been actively preceded in semiconductor industry. But due to the overlap issue and structural complexity of devices, it has become harder and harder to perform failure analysis using normal projected bright field (BF) and high angle annular dark field (HAADF) TEM images. To overcome these problems, 3-dimensional (3D) tomography technique has been suggested. In this work, we clarify the root cause of dark voltage contrast (DVC) failure at the bottom electrode contact region in PCRAM by using 3D tomography analysis. The 3D tomography samples were prepared in lamella shape by using focused ion beam (FIB). The electron energy loss spectroscopy (EELS) and 3D tomography analysis in scanning transmission electron microscope (STEM) HAADF mode were carried out. Through 3D tomography image reconstruction by AMIRA program, we observed ‘open contact fail’ between the BEC (Bottom Electrode Contact)-1 and the BEC (Bottom Electrode Contact)-2 at DVC region that could not be shown in 2D image.

Abstract FIB/SEM and TEM are standard characterization techniques for evaluation of process modification of microelectronics samples. In this paper, artefacts from these techniques are studied. The sample preparation methods are optimized to avoid damages. Seal-ring structures are chosen as an example in this study to show artefacts and difficulties in SEM and TEM observations. Two cases of artefacts are considered: one with TEM sample preparation followed by TEM imaging, and the other one with SEM observations after FIB cross-sectioning. In the first case, electronic chips that failed during stress tests are investigated, while in the second case a part has been dismissed during robustness qualification test. In the former, thickness of TEM lamellae has been evidenced as a key factor for delamination between layers under beam, whereas in the latter, it was observed that the electron beam lead to a shrink of oxide layers, which induced the break of underlying contacts.

Abstract In this paper, a novel inspection mode of electron beam inspection (EBI) that can effectively detect buried voids in tungsten (W) plugs is reported for the first time. Buried voids in metal are a defect of interest (DOI) that cannot be captured by either optical inspection or traditional EBI modes. The detection of buried voids is achieved by using energetic electron beam (e-beam) with energy high enough to penetrate into metal and reach the buried void. By selecting desired secondary electrons to form the inspection images, strong contrast between the defective tungsten plugs and normal ones can be achieved. Failure analysis was performed on the DOI that is unique to this new EBI mode. After optical microscope locating and laser marking, we successfully recaptured DOI with scanning electron microscope (SEM) and capped the DOI with e-beam assisted platinum (Pt) deposition. Later a dual-beam focused ion beam (FIB) system was used to re-locate the Pt-capped DOI and prepare samples for transmission electron microscope (TEM). TEM images confirmed the unique DOI were buried voids in the metal plugs, which could affect resistance of interconnect in integrated circuit (IC) chip and impact the IC yield.

Abstract This paper describes the investigation of donut-shaped probe marker discolorations found on Al bondpads. Based on SEM/EDS, TEM/EELS, and Auger analysis, the corrosion product is a combination of aluminum, fluorine, and oxygen, implying that the discolorations are due to the presence of fluorine. Highly accelerated stress tests simulating one year of storage in air resulted in no new or worsening discolorations in the affected chips. In order to identify the exact cause of the fluorine-induced corrosion, the authors developed an automated inspection system that scans an entire wafer, recording and quantifying image contrast and brightness variations associated with discolorations. Dark field TEM images reveal thickness variations of up to 5 nm in the corrosion film, and EELS line scan data show the corresponding compositional distributions. The findings indicate that fluorine-containing gases used in upstream processes leave residues behind that are driven in to the Al bondpads by probe-tip forces and activated by the electric field generated during CP testing. The knowledge acquired has proven helpful in managing the problem.

Abstract It is well known that pursuing the miniaturization of devices to lower the cost and increase high-speed performance are extremely important goals for dynamic random access memory (DRAM). Therefore, electron tomography has a high potential for application to novel generation DRAMs. In this article, several real-case examples of electron tomography on 90 nm technology DRAM, including barrier layer step coverage, via fill process observations and defect analysis are reported. These cases were demonstrated to show the applications of bright field-transmission electron microscope (BF-TEM) and HADDF- scanning transmission electron microscope (STEM) tomography to analyze barrier layer step coverage, defects, and W fill quality in advanced DRAM. By appropriate use of BF-TEM or HAADF STEM tomography, optimal information for failure analysis, root cause clarification, and subsequent process improvements can be obtained. Electron tomography holds significant advantages in comparison to traditional TEM imaging for appropriate cases.

Abstract In today’s competitive semiconductor environment, product performance and market timing has never been more valuable. Design IP, speed to market, and taking advantage of the most advanced technology are three ways fabless companies can maintain an advantage over the competition. Foundries target these demands by offering superior support, competitive technology, and rapid development cycles. Using the advanced tool suites of SEM, FIB, TEM, and Atomic Force NanoProbing (AFP) the failure analysis community now has the ability to investigate and compare foundry performance on the device level. The 28 nm LP Qualcomm “SHELBY” die is dual-sourced from both Samsung and TSMC, and is the primary die in the MDM9215 4G/LTE modem used in several smartphones. This represents a unique case of leading technology, available to the public, to qualify for electrical performance on the device level using the AFP and the corresponding physical differences using SEM and TEM. These advanced FA techniques were employed and were able to identify manufacturing differences between foundries. They were then used to relate the physical variations with the electrical device performance. The HG11-N3877 fabricated by TSMC and the HG11-N9204 fabricated by Samsung were the subjects of this comparison (see Error! Reference source not found.). The investigation located spatial and geometric variations of the SRAM devices using cross sectioning and TEM imaging. This was followed by Electrical Characterization of multiple SRAM Cells using the AFP. The electrical measurements showed clear differences in device parameters. These differences highlight manufacturing process differences between the two companies that could directly relate to chip performance.