The automation of nanoprobing application relies on the accurate detection of probe tips in scanning electron microscope (SEM) images. This work explores the application of deep learning models to automate and improve this critical process. Different models such as Mask R-CNN, YOLOv8 and RTMDet, trained on a specialized dataset, are used to accurately detect, segment and localize probe tips in SEM images, even under challenging conditions. Results show that these models have the potential to improve the automation of nanoprobing workflows, particularly in automatic tip positioning and crash prevention. Future work will focus on production-level deployment and the integration of tracking algorithms.

The Attention-Guided Neural Network is designed to analyze periodic SEM images of SRAM. Autoencoder latent features layer is used to reconstruct the crops of the original image. By thresholding the ability of the autoencoder to reconstruct the original image, the defects and artifacts of the original image are automatically located. This approach could be used to detect visual anomalies.

Image segmentation is a valuable tool for visual image data inspection of semiconductor device structures. For the large amounts of data provided by recent advancements in automated scanning electron microscope (SEM) and focused ion beam-scanning electron microscope (FIB-SEM) data acquisition, automatic segmentation becomes indispensable to fully exploit the information contained in the data in automated characterization workflows. Using two exemplary FIB-SEM tomography datasets, we explored artificial intelligence based image segmentation using only a minimum amount of training images annotated by a human user.

Analyzing scan chain failures is challenging without dedicated test hardware. Traditional solutions like ATE testers and compact diagnosis tools have significant drawbacks: they're expensive, require complex hardware customization and proprietary software licenses, and need substantial lab space. This paper presents a cost-effective alternative: a portable, flexible, and fully customizable bench-top scan chain testing system that easily integrates with fault isolation tools. Using an off-the-shelf embedded development tool, we replicated the complete scan chain testing process—from pattern generation to test vector transmission/reception and results comparison. The system reduces costs by approximately 200-fold compared to traditional solutions. We validated our approach by analyzing a device with marginal and frequency-dependent stuck-at-scan failures. Using DALS (Dynamic Analog Laser Stimulation), we successfully localized the defect and confirmed it through mechanical delayering, FIB cross-sectioning, and SEM imaging.

Wordline defects in 3D Replacement Gate NAND (RG NAND) are a major issue holding back part functionality and yield. Shorted wordline locations isolated by EBIRCH enable precise lamella preparation for STEM/TEM, increasing the defect visual rate for physical failure analysis. Due to deprocessing limitations, such as specialized tool requirements, part-specific die preparation knowledge, and the location of the defect in the die, makes preparing samples for successful EBIRCH isolation difficult and time-consuming. A novel sample preparation method for SEM-based nanoprobing has been developed to solve these issues, enabling EBIRCH/EBAC for isolating wordline defect locations with minimal advanced deprocessing and which can be similarly applied to any RG NAND node.

Electron-beam-induced current (EBIC) analysis at device cross-sections has emerged as a powerful technique for semiconductor device characterization. Unlike traditional top-down approaches, cross-sectional EBIC directly visualizes junction profiles and depletion region behavior under various bias conditions. This paper synthesizes several years of research through five case studies demonstrating cross-sectional EBIC applications. Our methodology combines precise sample preparation techniques—including laser cutting with polishing or direct cleaving, followed by focused ion beam (FIB) fine-polishing—with variable electron beam landing energies to examine junctions at different depths. For advanced technology nodes, we emphasize the importance of EBIC resolution and noise floor optimization for reliable results. We demonstrate how the observed space charge region width correlates with doping concentration and can be modulated through reverse bias application, providing valuable insights into device characteristics.

Photoresist (PR) profiles tend to have deformation and shrinkage with typical transmission electron microscopy (TEM) analysis method using a focused ion beam scanning electron microscope (FIB-SEM) and TEM. The elevated temperatures during sample preparation and TEM analysis are believed to contribute to these issues. This study evaluates the effectiveness of cryogenic workflow in mitigating PR profile shrinkage by employing cryo-focused ion beam (Cryo-FIB) and cryo-transmission electron microscopy (Cryo-TEM). Comparative experiments were conducted at room temperature and cryogenic conditions, demonstrating that full cryogenic workflow reduces the shrinkage of PR, bottom anti-reflective coating (BARC), and line critical dimension (CD). Our findings indicate that both the sample preparation and analysis temperatures influence PR profiles. This study highlights how the full cryogenic workflow significantly minimizes shrinkage, providing more accurate PR profile measurements.

Advanced node semiconductor reverse engineering has always demanded cutting-edge techniques to cleanly extract the key structural information from the integrated circuit (IC) design. Core circuit edit technologies such as taking a backside wafer approach, employing scanning focused ion beam (FIB) recipes, optimized chemical delivery, and endpoint technology based on ultraviolet (UV) photon spectroscopy can play an important role in success. Once delayered, the IC's structural layers can be subjected to high-resolution scanning electron microscope (SEM) imaging. A new tool has been developed that incorporates these capabilities for dedicated IC delayering. These capabilities allow for the visualization of individual layers, transistors, interconnects, and other critical elements at nanometer-scale resolution, unveiling valuable insights into the IC's design and functionality.

As semiconductor devices continue to decrease in size and pitch, demands for accurate microstructural analysis have increased to enable downward scaling. Critical dimension (CD) metrology is key to delivering process insights, but at such scales, rigorous metrology analysis providing high precision data may lack desired throughput. CD measurement using the scanning electron microscope (SEM) is a widely used technique, however, to acquire large area SEM images with high precision, multiple image stitching is currently required. In this paper, a new method for precise and efficient metrology analysis is introduced. This study demonstrates that large area imaging with ultra-high pixel resolution can deliver better throughput while maintaining the same level of precision that can be achieved by the traditional method.

As integrated circuit (IC) feature dimensions have shrunk, the need for precise and repeatable sample preparation techniques has increased. In this work, the process of preparation of ultrathin planar-to-cross-section conversion transmission electron microscopy (TEM) samples using a gallium dual-column focused ion beam (FIB)/scanning electron microscope (SEM) system is examined. Sample preparation technique in this paper is aimed at repeatably isolating features in the 5-30 nm range, while limiting common issues such as amorphization, lamella warpage, and the curtain effect (or “curtaining”). This can be achieved through careful selection of FIB parameters including ion beam energy, ion beam current, stage tilt, and deposited protective layer materials and thicknesses, which are all discussed in this work.

An approach to overcome barriers to practical Compressed Sensing (CS) implementation in serial scanning electron microscopes (SEM) or scanning transmission electron microscopes (STEM) is presented which integrates scan generator hardware specifically developed for CS, a novel and generalized CS sparse sampling strategy, and an ultra-fast reconstruction method, to form a complete CS system for 2D or 3D scanning probe microscopy. The system is capable of producing a wide variety of highly random sparse sampling scan patterns with any fractional degree of sparsity from 0- 99.9% while not requiring fast beam blanking. Reconstructing a 2kx2k or 4kx4k image requires ~150-300ms. The ultra-fast reconstruction means it is possible to view a dynamic reduced raster reconstructed image based upon a fractional real-time dose. This CS platform provides a framework to explore a rich environment of use cases in CS electron microscopy that benefit from the combination of faster acquisition and reduced probe interaction.

The direct measurement of the memory state (i.e. bit at “0” or at “1”) on single magnetic tunnel junction (MTJ) in a commercial magnetic random access memory (MRAM) remains challenging. In this paper, we propose a probing approach to investigate the MTJ resistance and by this way determine the memory state. To reach this goal, the MRAM device needs to be prepared to create an electrical access to both sides of the MTJs. The suitable methodology consists in a backside preparation routine that creates a bevel allowing us to access the bottom side of the MTJs through vias and the top side to the bitlines. After that, two approaches are discussed to establish the electrical connection. First described is the nanoprobing technique where the electrical connection is created by two nanometric tips positioned in contact on vias and bitlines thanks to a scanning electron microscope. It is then possible to collect the current flowing through the MTJs and to evaluate the resistance. A resistance around 12 kΩ and 14 kΩ were determined for “0” and “1” bits respectively, which is in agreement with literature. Secondly, these measurements will be compared to those resulting from a near-field probing experiment done in a conductive mode. A resistance around 19 kΩ and 24 kΩ were determined for “0” and “1” bits respectively. The use of both methods allows for a cross-reference between the resistance values and a discussion on the advantages and drawbacks of both probing techniques.

Complex failure analysis often requires the use of multiple characterization instruments. For example, a defect or failure may be localized using one tool, whereas the subsequent marking, precision targeting, and high-resolution analysis may require completely different instruments. As a result, the analysis workflows require sample and operator coordination between instruments and engineers, which leads to lower throughput and success rates. This paper describes a complete in-situ workflow for comprehensive failure analysis processes on a compound semiconductor using a state-of-the-art FIB/SEM system, incorporating electron channeling contrast imaging (ECCI) and a STEM-in-SEM detector used in unison with an insertable detector positioned underneath the sample to capture transmitted electron condensed beam electron diffraction (CBED) micrographs.

The results of analyses on a commercially available 7 nm SRAM, using an in-situ AFM inside a SEM, are presented. In addition to typical results for conductive AFM, a novel method is described that uses the SEM beam to prepare a region for additional material removal, thus bringing out clearer electrical data. This would be of exceptional value for technology nodes using cobalt as a contact material. Finally, techniques making use of the current from the SEM beam as the source of current during the measurement are described. The technique may have value for well resistance measurements using in-situ structures on live product, a survey of junction health, or the localization of point defects.

This presentation is a pictorial guide to the selection and application of measurement methods for defect localization. The presentation covers passive voltage contrast (PVC), nanoprobing, conductive atomic force microscopy, and photon emission microscopy (PEM). It describes signal types, how the measurements are made, the sensing mechanisms involved, and the output that can be expected.

In this paper, we describe the technique of on-axis transmission Kikuchi diffraction (TKD) in a scanning electron microscope and demonstrate its use in characterizing nanoscale crystal structures and defects in semiconductor materials and devices. We explain how we modified hardware and software to achieve an effective spatial resolution of 2 nm during orientation mapping without decreasing acquisition speed, indexing quality, and other performance parameters. The paper includes illustrations comparing sample-detector geometries for conventional EBSD, TKD, and on-axis TKD. It also presents examples of the types of images that can be obtained using on-axis TKD, including raw crystal orientation maps, diffraction patterns, pattern quality maps, time-resolved orientation maps showing microstructure evolution, and a sparse sample map showing the distribution of quantum dots on an electron transparent support film.

This paper explains how the authors determined the cause of a fast-to-rise failure discovered during scan chain testing of an image sensor. The failed device was mounted on a portable card that facilitates transfer between test platforms in an electro-optical probing (EOP) system. Initial fault localization was conducted through backside PEM, but the results were inconclusive. The part was then analyzed on a digital scan chain tester to check for flaws in the daisy chain of shift registers. Through broken scan chain analysis, the potential cause of the problem (a failing flip-flop) was narrowed down to a few chain links and ultimately pinpointed using EOP fault isolation techniques. The failed device was then deprocessed by parallel lapping and analyzed in a SEM, revealing a broken poly gate as the physical cause of failure.

This paper presents a die-level sample preparation technique that uses selective etch chemistry and laser interferometry to expose the entire top metal layer surface for electrical fault isolation. It also describes a novel e-beam based probing technique called StaMPS which is used to isolate logic structure failures through SEM image contrasts. By landing SEM probe tips on exposed metal pads and controlling logic states via an applied bias, different levels of contrast are created highlighting structural failure locations. Die-level sample preparation combined with e-beam fault isolation optimizes turnaround time by delayering die in less than an hour and by locating several types of defects in a single sample.

This paper describes optical and electron beam based fault isolation approaches for short and open defects in nanometer-scale through-silicon via (TSV) interconnects. Short defects are localized by photon emission microscopy (PEM) and optical beam-induced current (OBIC) techniques, and open defects are isolated by active voltage contrast imaging in a scanning electron microscope (SEM). The results are confirmed by transmission electron microscopy (TEM) cross-sectioning.

This presentation is a pictorial guide to the selection and application of measurement methods for defect localization. The presentation covers electron beam absorbed current (EBAC), electron beam induced current (EBIC), passive voltage contrast (PVC), optical and electron beam induced resistance change methods (OBIRCH and EBIRCH), lock-in thermography, photon emission microscopy (PEM), and nanoprobing. It describes how the measurements are made, the sensing mechanisms involved, and the output that can be expected.